Program and storage transformations for improving memory performance

用于提高内存性能的程序和存储转换

• 批准号: 0073800
• 负责人: Jagannathan Ramanujam
• 金额: $ 12.03万
• 依托单位: Louisiana State University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2000
• 资助国家: 美国
• 起止时间: 2000-09-01 至 2004-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0073800&HistoricalAwards=false
• 关键词: Program; storage; transformations; improving; memory

Jagannathan Ramanujam, Louisiana State UniversityThe performance of programs on modern processors depends critically onhow their memory access characteristics can be matched to themulti-level memory hierarchy commonly used in these processorarchitectures. The goal of this project is derive compilertransformations to improve the memory performance of scientificcomputations. In particular, a combination of program restructuringand memory layout transformations of data will be derived to handle alarger class of programming constructs than perfect nests and regularmemory accesses. This project will study several important problems,including: (a) strategies to integrate tiling and data shackling inorder to effectively orchestrate the movement of data through memoryhierarchies; (b) issues in the design of a sophisticatedlocality-enhancing compiler for regular and irregular codes; (c)extensive experimental evaluation of locality-enhancingtransformations; (d) insights on the interaction between techniquesfor exploiting instruction-level parallelism and register-level reuse;and (e) possible insights on improvements in the design of memorysystems for applications, including the design of application-specificcache architectures. Most importantly, these compiler techniques willallow users to easily exploit the enormous computation power in modernprocessor architectures.

Jagannathan Ramanujam，路易斯安那州立大学程序在现代处理器上的性能关键取决于它们的内存访问特性如何与这些处理器架构中常用的多级内存层次结构相匹配。 这个项目的目标是派生编译器转换，以提高科学计算的内存性能。特别是，程序重构和数据的内存布局转换的组合将被导出，以处理比完美嵌套和常规内存访问更大类的编程构造。该项目将研究几个重要问题，包括：（a）整合平铺和数据捆绑的策略，以便有效地协调数据在存储器层次结构中的移动;（B）规则和不规则代码的简化局部增强编译器的设计问题;（c）局部增强转换的广泛实验评估;（d）局部增强转换的实验评估。（d）深入了解利用并行级并行和寄存器级重用的技术之间的相互作用;以及（e）对改进应用程序的存储器系统设计的可能见解，包括应用程序专用高速缓存体系结构的设计。 最重要的是，这些编译器技术将允许用户轻松地利用现代处理器架构中的巨大计算能力。