Loop Transformations and Scheduling Techniques for Distributed Memory Multiprocessors

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New techniques for parallelizing scientific computing programs for distributed memory multiprocessors will be developed in this project. In particular, the problem of compiling nested loops will be investigated. The solution of a number of tiling problems will be attempted first. Then examination of methods of determining deadlock-free partitions, size, allocation, and scheduling of tiles and minimizing communication for efficient parallel execution of programs on distributed memory multiprocessors will be carried out. In addition, new tools for optimizations dealing with architectural capabilities of individual processors will be investigated.