Towards an Automated Development Environment for Parallel Computing with Reconfigurable Processing Elements

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ABSTRACTProposal: 0075792PI: Michael LangstonAn adaptive computing system (ACS) offers a revolutionary combination of the performance of custom hardware and the flexibility of software by employing reconfigurable technology. A key feature of an ACS is the reconfigurable processing element, which, in the current generation, is a Field-Programmable Gate Array (FPGA) chip. This research project investigates the impact of an ACS in the context of a high-performance computational grid with clusters-of-workstations, shared memory multi-processors and rapid interconnects. Suites of fast estimators are devised using approximation algorithms for FPGA mapping and partitioning. An assortment of algorithmic methods is applied. A major focus is on new heuristic and optimization strategies designed to exploit emergent mathematical techniques. Supporting software tools are also developed, with an emphasis placed on portability. Implementation testbeds are built around edge-based segmentation and related problems common to a variety of image processing applications.