ITR: Adaptive Fault Recovery for Networked Digital Systems

在这个项目中，开发了一个集成的故障恢复系统，该系统可以快速隔离可编程数字元件中的故障，并确定新的设备编程配置，使其恢复全部功能。在检测到诸如数字信号处理器或现场可编程门阵列的数字组件中的硬件故障之后，在受故障影响的本地嵌入式系统处进行从故障恢复的尝试。如果本地系统无法完成恢复工作，则可以通过本地网络访问计算能力更强的远程系统以帮助恢复工作。在任一情况下，恢复过程的结果都是新的设备配置(指令序列或配置比特流)。这种配置允许受影响的系统执行与原始配置相同的逻辑功能，同时避免检测到的功能硬件故障。这项工作的直接结果是一套针对DSP和FPGA的编译技术，这些技术产生指令和位流配置，以避免检测到的硬件故障。这些工具通过使用构建在经常用于科学计算的操作系统中的TCP/IP传输机制直接集成到网络环境中。

In this project an integrated fault recovery system is developed thatquickly isolates faults in programmable digital components anddetermines new device programming configurations to return themto full functionality. After detection of a hardware fault in a digitalcomponent such as a digital signal processor or a field-programmablegate array, an attempt to recover from the fault is made at the local embedded system affected by the fault. If the local system is unable to complete the recovery effort, a computational-superior remote systemmay be accessed via a local network to aid in the recovery effort.In either case, the result of the recovery procedure is a new deviceconfiguration (instruction sequence or configuration bitstream). This configuration allows the affected system to perform the same logical function as the original configuration while avoiding the detected functional hardware fault.The direct result of this work is a set of compilation techniques forboth DSPs and FPGAs that produce instruction and bitstreamconfigurations that avoid detected hardware faults.These tools are directly integrated into a networkedenvironment through the use of TCP/IP transfer mechanisms built intooperating systems frequently used for scientific computing.