High-Performance Computer Architecture in the Nanoelectronics Era: Overcoming the Reliability Challenge

纳米电子时代的高性能计算机架构：克服可靠性挑战

• 批准号: 0310119
• 负责人: Margarida Jacome
• 金额: $ 15万
• 依托单位: University of Texas at Austin
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2003
• 资助国家: 美国
• 起止时间: 2003-08-01 至 2006-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0310119&HistoricalAwards=false
• 关键词: Performance; Computer; Architecture; Nanoelectronics; Era

JacomeHigh-Performance Computer Architecture in the Nanoelectronics Era: Overcoming the Reliability ChallengeAbstractThe formidable increase in device densities promised by nanoscale integration will be accompanied by a substantial rise in the numbers of faulty devices. This increase in both hard and soft faults poses a major `reliability challenge,' demanding a rethinking of fundamental microarchitectural techniques and components. Indeed, performance will be inextricably tied to reliability. Thus, it is important to investigate how effective reliability-performance tradeoffs can be realized at the microarchitecture level. The proposal includes research on several novel techniques including: reliability driven speculation, adaptive validation via incremental recomputing of speculated values, and exploiting reliability-aware functional units and self-checking capabilities. In addition the research includes devising novel design methodologies aimed at achieving the necessary reliability for microarchitectural components, and models capturing the scaling of delay versus reliability for concrete component designs. Key quality metrics (performance, reliability and yield) will be evaluated through analysis and simulation.The timeliness, strategic importance and huge potential payoff of advances in nanotechnologies are widely recognized. The ability to engineer these technologies into new products will create tremendous opportunities for economic expansion and improved quality of life. Taking these technologies into production environments requires addressing the reliability challenges identified in this proposal. The outcomes of this project are likely to impact the design of future nanocomputing systems.

纳米电子时代的高性能计算机体系结构：克服可靠性挑战摘要纳米级集成所带来的器件密度的巨大增长将伴随着故障器件数量的大幅增加。硬故障和软故障的增加带来了重大的“可靠性挑战”，要求对基本的微架构技术和组件进行重新思考。事实上，性能将与可靠性密不可分。因此，研究如何在微体系结构级别实现有效的可靠性和性能权衡是很重要的。该提案包括研究几种新技术，包括：可靠性驱动的推测，通过增量重新计算推测值的自适应验证，以及利用可靠性感知功能单元和自检能力。此外，研究还包括设计新的设计方法，旨在实现微建筑组件的必要可靠性，以及捕获具体组件设计的延迟与可靠性比例的模型。关键质量指标（性能、可靠性和良率）将通过分析和模拟进行评估。纳米技术进步的时效性、战略重要性和巨大的潜在回报得到了广泛认可。将这些技术设计成新产品的能力将为经济扩张和提高生活质量创造巨大的机会。将这些技术应用到生产环境中，需要解决本提案中确定的可靠性挑战。这个项目的结果可能会影响未来纳米计算系统的设计。