ITR: Concurrent Electro-Thermal Modeling of Ultra-Scaled MOS Technologies

近年来，微电子器件和电路不断小型化。电子器件的典型沟道长度目前为180 nm，预计到2008年将降至70 nm，研究实验室已经制造出3-40 nm范围内的新器件。尽管电源电压有所下降，但到本十年末，新兴晶体管设计的功耗预计将达到每个芯片160W。新兴技术，如绝缘体上硅(SOI)FET，由于芯片设计的隔热特性，面临严重的自加热增加，预计热诱导故障将会增加。这项提议寻求从计算上探索微电子器件的耦合电热行为。虽然将对10-180 nm范围内的通道尺度进行研究以构建完整的图景，但该提案的重点是在较小尺度上了解热行为。这项工作将探索声子边界散射、热点弹道声子输运引起的小热源效应和声子限制效应等重要微观尺度热现象的影响，这些现象显著改变了声子色散曲线，降低了声子群速度。将建立基于分子动力学和玻尔兹曼输运方程的模型，电子-声子相互作用由全能带蒙特卡罗模拟器MOCA计算。最后，这些声子输运和热产生模型将耦合到其他器件结构的傅立叶传导模型，以了解新兴的超尺度器件的热行为。本提案是对NSF 02-168信息技术研究的回应，属于“小”类。该奖项由化学和运输系统部门的热运输和热加工项目资助。

In recent years, there has been continuous miniaturization of microelectronic devices and circuits. Typical channel lengths in electronic devices, currently at 180 nm, are expected to fall to 70 nm by the year 2008 and new devices in the 3-40 nm range have already been fabricated in research laboratories. Despite drops in supply voltage, power dissipation in emerging transistor designs is expected to reach 160 W per chip by the end of this decade. Emerging technologies, such as silicon-on-insulator (SOI) FETs, face severely increased self-heating because of the thermally insulating properties of the chip design, and thermally-induced failures are expected to increase. This proposal seeks to explore computationally the coupled electro-thermal behavior of microelectronic devices. Though channel scales ranging from 10-180 nm will be studied to build a complete picture, the emphasis of the proposal is on understanding thermal behavior at the smaller scales. The proposed work will explore the influence of important micro-scale thermal phenomena such as phonon boundary scattering, small heat-source effects due to ballistic phonon transport in the hot spot, and phonon confinement effects, which substantially alter phonon dispersion curves and decrease phonon group velocities. Models based on both molecular dynamics as well as the Boltzmann transport equation will be developed, with electron-phonon interaction being computed by the full-band Monte Carlo simulator MOCA. Finally, these phonon transport and heat generation models will be coupled to Fourier conduction models for other device structures to understand the thermal behavior of emerging ultra-scaled devices. This proposal was submitted in response to NSF 02-168 Information Technology Research, in the "Small" category. The award has been funded by the Thermal Transport and Thermal Processing Program of the Chemical and Transport Systems Division.