ITR: Synchroscalar: Exploiting Synchronized Clock Domains for Energy Efficient Multirate Embedded Computation

Synchroscalar，将同步时钟域用于高能效的多速率嵌入式系统摘要无处不在的计算和通信设备将主导新千年的社会和经济格局。随着这些设备功能的发展，当前的微处理器设计无法跟上电池寿命和性能要求。我们建议用一种新颖的微处理器设计来解决这个问题，该设计结合了两种方法。首先，我们将工作分解为多个平行的部分以提高性能。其次，为了节省电力，我们以达到所需通信质量所需的最低速度运行每个部件。具体地说，我们提出了同步标量体系结构，这是一种处理瓦片的二维网格，其中每列形成一个单独的时钟和电压域。时钟频率与有理因数相关，它将被用来调度不同时钟域之间的数据传输，而不会在时钟边界之间招致异步通信的开销，同时保留每列的最佳时钟的好处。这种组织为我们提供了许多异步系统的能源优势，同时保持了同步系统的简单性。这些方法的成功将显著增加信息技术对国家的影响，使许多“有线”应用程序成为无线和移动的。

ChongITR: Synchroscalar, Exploiting Synchronized Clock Domains for EnergyEfficient Multirate Embedded SystemsAbstractUbiquitous computation and communication devices will dominate the social and economic landscape of the new millennium. As the functionality of these devices evolve, current microprocessor designs cannot keep up with the battery life and the performance requirements. We propose to address this problem with a novel microprocessor design that uses a combination of two approaches. First, we break the work into many parallel pieces to increase performance. Second, to save power, we run each piece at the minimal speed necessary to achieve the quality of communication desired. Specifically, we propose the Synchroscalar architecture, a two-dimensional mesh of processing tiles in which each column forms a separate clock and voltage domain. Clock frequencies are related by a rational factor, which will be exploited to schedule data transfers between different clock domains without incurring the overhead of asynchronous communication between clock boundaries, yet retaining the benefits of optimal clocking for each column. This organization gives us the many of the energy advantages of asynchronous systems while maintaining the simplicity of a synchronous system.The success of these approaches will significantly increase the impact of information technology on the nation, enabling many "wired" applications to become wireless and mobile.