Transactional Memory
Transactional Memory
批准号:
0410042
负责人:
Maurice Herlihy
金额:
$0.0万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2004
资助国家:
美国
项目状态:
已结题
起止时间:
2004-08-01 至 2008-07-31
关键词:
中文摘要
国家科学基金会分布式系统研究CISE/CNSABSTRACT提案编号:0410042主要研究员:Herlihy,Maurice机构:布朗大学提案标题:事务性内存这个项目关注一种称为事务性内存的多处理器同步新方法。 这种方法用轻量级事务(看起来像是原子执行的指令序列)取代了传统的锁定技术。 transmitted内存依赖于硬件和软件支持的组合。 该项目探讨了支持交易的硬件和软件之间的接口。硬件非常适合访问小内存区域的短事务,但对于较长事务或访问更多内存的事务则不太有效。 不能直接在硬件中执行的事务必须部分或全部在软件中执行,该项目正在研究一系列可能的权衡。该项目还探讨了事务内存模型对高并发数据结构设计的影响。 虽然事务存储器比传统的锁技术提供了更好的细粒度并发支持,但它也为新型数据结构设计和算法提供了机会。 每年,处理器都变得更快,更便宜。然而,最近,诸如散热等基本限制使得时钟速度的进步变得越来越困难。 另一种方法称为多处理,它利用多个处理器一起工作。 不幸的是,目前的多处理器同步技术很难使用,而且在大规模系统中的扩展性很差。这个项目研究的另一种同步模型prom-ises一个实质性的障碍,更有效的多处理器计算。该项目的结果将通过学术出版物和开放源码软件传播。Fleisch Program Director,CISE/CNS May 26,2004..
英文摘要
National Science FoundationDistributed Systems Research CISE/CNSABSTRACTProposal Number: 0410042Principal Investigator: Herlihy, MauriceInstitution: Brown UniversityProposal Title: Transactional MemoryThis project focuses on an new approach to multiprocessor synchronization called transactional memory. This approach replaces conventional locking techniques with light-weight transactions: sequences of instructions that ap-pear to execute atomically. Transactional memory relies on a combination of hardware and software support. The project explores the interface between hardware and software support for transactions. Hardware is well-suited for short transactions that access a small memory region, but is less effective for longer transactions, or transactions that access more memory. Transactions that cannot be executed directly in hardware must be executed partially or en-tirely in software, and the project is investigating a range of possible trade-offs.The project also explores the implications of the transactional memory model for the design of highly-concurrent data structures. While transactional mem-ory provides better support for fine-grained concurrency than conventional ock-ing techniques, it also provides opportunities for new kinds of data structure designs and algorithms.This project addresses a fundamental problem in modern computing. Every year, processors get faster and cheaper. Recently, however, fundamental limita-tions such as heat dissipation have made advances in clock speed increasingly difficult. An alternative approach, called multiprocessing, harnesses multiple processors to work together. Unfortunately, current techniques for multiproc-essor synchronization are difficult to use, and scale poorly to large-scale sys-tems. This alternative synchronization model investigated by this project prom-ises to one substantial barrier to more effective multiprocessor computing. The project's results will be disseminated through scholarly publication andopen-source software.Dr. Brett D. FleischProgram Director, CISE/CNSMay 26, 2004..
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
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