SGER: Wireless techniques for architecture and fault tolerance

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SGER: Wireless Techniques for Architecture and Fault ToleranceThe research will investigate the viability of using wireless communication as a side-channel for communication in a computer system to increase performance and reliability. The advantages of the scheme are the reduction in the complexity and cost of auxiliary copper wiring and omni-directional communication. Suitable bandwidth-appropriate functions such as cache block updates, multiprocessor cache coherence, on-line fault diagnosis, and expandable memory will be the target for initial performance and reliability improvements.In this work we will investigate the feasibility of wireless side-channel communication for a number of different promising functions, and identify architectural design and implementation tradeoffs. Long-term efforts are directed towards transforming computer systems by the use of a hierarchy of communication technologies.