Cooperative Hardware/Software Designs for Virtual Instruction Set Computers

虚拟指令集计算机的软硬件协同设计建议。的伊利诺伊州，Urbana 0429561这项工作提出了一类合作的编译器/微体系结构技术，可以提高性能，降低复杂性和功耗的通用处理器。 这些技术的主要特点是，它们利用了编译器和处理器之间广泛的、特定于实现的指令集接口，通过使用虚拟指令集计算机（VISC）体系结构来实现，VISC体系结构的特征在于具有两个指令集-一个暴露于软件一个是虚拟伊萨或V-ISA，另一个是实际上由硬件实现的伊萨或I-ISA，还有一个翻译器用于用第二个透明地模拟第一个。 由于I-ISA从不暴露于软件（除了在逻辑上是处理器设计的一部分的特定于实现的翻译器），因此它可以自由地暴露特定于实现的微架构细节和接口，而无需担心跨实现的二进制兼容性。 正是这个机会，架构一个实现特定的伊萨和使用它的合作编译器/微体系结构技术，这是本proposal.Two方面的建议工作区分它从以前的工作软件暴露的架构。 首先，我们从一个丰富的V-ISA层进行翻译，该层保留了程序源代码中的许多高级信息。 我们假设，这些信息的可用性是根本的翻译的能力，转换的代码，利用提出的机制，我们将评估这一假设的建议的技术。 其次，所提出的技术是真正的合作，在编译器可以有充分的知识，实现特定的细节的微架构，和微架构可以依赖于信息和代码生成约束编译器。 这给了我们的设计充分的自由来利用编译器和硬件的独特和互补的优势;两个系统都不是对方的从属。 而硬件可以有效地观察和响应动态事件，可以便宜地推测和验证的投机，编译器可以执行全局分析，以减少和简化的决定，硬件必须作出，并消除不必要的投机。具体而言，我们提出了开发合作编译器技术和微架构，以解决现代通用处理器的关键挑战。 对于这些挑战中的每一个，我们将探索一个或两个技术（在提案中描述），这些技术广泛依赖于软件交互，如果没有VISC方法，这些技术将是不切实际的。

AbstractCooperative Hardware/Software Designs for virtual Instruction Set ComputersVikram S. AdveU. of Illinois, Urbana0429561This work proposes a class of cooperative compiler/microarchitecture techniques that can improve performance and reduce the complexity and power-consumption of general-purpose processors. The key feature of these proposed techniques is that they exploit a wide, implementation-specific instruction set interface between the compiler and the processor, enabled by the use of Virtual Instruction Set Computer (VISC) architecture.A VISC architecture is characterized by having two instructions sets - one which is exposed to software (the virtual ISA or V-ISA) and another which is actually implemented by hardware (the implementation ISA or I-ISA)-and a translator that is used to transparently emulate the first with the second. Because the I-ISA is never exposed to software (other than an implementation-specific translator that is logically part of the processor design) it can freely expose implementation specific microarchitectural details and interfaces without concerns for binary compatibility across implementations. It is this opportunity to architect an implementation-specific ISA and use it for cooperative compiler/microarchitecture techniques that is the central focus of this proposal.Two aspects of the proposed work differentiate it from previous work on software-exposed architectures. First, we are translating from a rich V-ISA layer that retains much of the high-level information present in the program's source code. We hypothesize that the availability of this information is fundamental in the translator's ability to transform the code to exploit the proposed mechanisms, and we will evaluate this hypothesis for the proposed techniques. Second, the proposed techniques are truly cooperative, in that the compiler can have full knowledge of implementation-specific details of the microarchitecture, and the microarchitecture can rely on information from and code generation constraints on the complier. This gives our designs full freedom to exploit the distinct and complimentary strengths of compilers and hardware; neither system is the other's subordinate. Whereas hardware can efficiently observe and respond to dynamic events and can cheaply speculate and validate that speculation, the compiler can perform global analysis to reduce and simplify the decisions the hardware has to make and to eliminate unnecessary speculation.Specifically, we proposed to develop cooperative compiler technology and microarchitectures that address critical challenges in modern general-purpose processors. For each of these challenges, we will explore one or two techniques (described in the proposal) that rely extensively on software interaction, and which would be impractical without the VISC approach.