SHF: Small: Taming Huge Page Problems for Memory Bulk Operations Using a Hardware/Software Co-Design Approach

与传统的动态随机存取存储器(DRAM)相比，非易失性存储器(NVM)技术的最新进展有望显著提高容量。如今的计算机往往将NVM和DRAM结合起来，构建一个统一的内存架构，满足许多新兴的大数据和人工智能应用的极高要求。然而，管理超大容量内存带来了令人生畏的系统挑战。特别是，NVM的大规模并行性推动采用巨大的两兆字节甚至更大的内存页。该项目活动的成功完成将是朝着加速安全非易失性存储器体系结构迈出的重要一步，性能将提高数量级。该项目还将通过吸纳西班牙裔服务机构代表性不足的群体以及计算机科学和工程教育和培训的研究传播，为社会作出贡献。研究项目采用硬件和软件共同设计的方法解决这些问题。在该项目中，将设计、建模和实施一个通用的细粒度内存管理系统，以显著提高单级DRAM的速度和带宽，并结合用于中央处理单元(CPU)和图形处理单元(GPU)机器的超低延迟、非易失性存储器体系结构，特别是对于大型页面配置。现有硬件体系结构单元中未使用和过度配置的部分将通过非侵入式和侵入式两种方式加以利用，以实现细粒度的内存管理，并实现写入时拷贝机制的高效率和有效性。将进一步研究几个新的写入时拷贝用例，包括检查点和快照，以及大型语言模型服务。此外，新的内存架构将与大数据管理、人工智能程序和硬件安全机器的高速处理工作流程相集成。该奖项反映了NSF的法定使命，并已通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

Recent advances in non-volatile memory (NVM) technologies promise significantly higher capacities compared to traditional dynamic random-access memory (DRAM). Today’s computers often combine NVM with DRAM to construct a unified main memory architecture that meets the extremely high demand of many emerging big data and artificial intelligence applications. However, managing ultra-high capacity memories introduces daunting systems challenges. In particular, the massive parallelism of NVM drives adoption of huge two megabytes or even larger memory pages. The successful completion of this project's activity will be a significant step towards accelerating the secure non-volatile memory architectures by orders of magnitude performance improvement. This project will also contribute to society through engaging under-represented groups from a Hispanic Serving Institution and research dissemination for computer science and engineering education and training.The research project tackles these issues using a hardware and software co-design methodology. In this project, a general-purpose, fine­-grained memory management system will be designed, modeled, and implemented to significantly improve both the speed and bandwidth of single-level, DRAM combined with ultra-low latency, non-volatile memory architecture for both central processing unit (CPU) and graphic processing unit (GPU) machines, in particular for huge page configurations. The unused and overprovisioned parts of existing hardware architecture units will be exploited via both non-intrusive and intrusive ways to enable fine-granularity memory management, and achieve high efficiency and effectiveness of the Copy-on-Write mechanism. Several new Copy-on-Write use cases, including the checkpointing and snapshot, and large language model serving will be further studied. Furthermore, the new memory architecture will be integrated with the high-speed processing workflow of big data management, artificial intelligence programs, and hardware security machines.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.