Collaborative Research: SecureCore for Trustworthy Commodity Computing and Communications

协作研究：用于可信商品计算和通信的 SecureCore

• 批准号: 0430566
• 负责人: Cynthia Irvine
• 金额: $ 29.34万
• 依托单位: Naval Postgraduate School
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2005
• 资助国家: 美国
• 起止时间: 2005-04-01 至 2008-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0430566&HistoricalAwards=false
• 关键词: Collaborative; Research; SecureCore; Trustworthy; Commodity

The SecureCore project will investigate and design a secure integrated core architecture for trustworthy operation of mobile computing devices consisting of: a security-aware general-purpose processor, a small security kernel and a small set of essential secure communications protocols. The research will use a "clean slate" approach to define a minimal set of fundamental architectural features required for such a secure core, for use in resource-constrained, ubiquitous computing platforms exemplified by secure embedded systems (e.g., computer in a heart monitor), pocket devices (e.g., contact-less smart card), and mobile computing devices (e.g., handheld web-enabled computer). This approach shows what is possible when security is designed in at the beginning rather than added as an after-thought. It also changes the design paradigm from an emphasis on performance to one on trustworthy, dependable operation. The goal is to achieve the desired security levels without compromising performance, size, cost, energy consumption, or usability. Threat models will be re-examined in the new context of continuously networked commodity devices and Internet-scale epidemics such as DDoS, worms and viruses. The broader impact is to provide the scientific basis for trustworthy computing, communications and storage in pervasive computing environments. SecureCore impact will be immense if its architecture influences the design of future trustworthy commodity products, as well as the curriculum for computer hardware and software engineering education.

SecureCore项目将研究和设计一个安全的集成核心架构，用于移动的计算设备的可靠操作，该架构包括：一个安全感知通用处理器、一个小型安全内核和一套小型基本安全通信协议。该研究将使用"白板"方法来定义这种安全核心所需的基本架构特征的最小集合，用于资源受限的无处不在的计算平台，例如安全嵌入式系统（例如，心脏监视器中的计算机），袖珍设备（例如，非接触式智能卡），以及移动的计算设备（例如，手持网络使能计算机）。这种方法展示了在开始时就设计安全性而不是事后添加安全性的可能性。 它还将设计范式从强调性能转变为强调可信赖、可靠的操作。 目标是在不影响性能、尺寸、成本、能耗或可用性的情况下实现所需的安全级别。 威胁模型将在持续联网的商品设备和DDoS、蠕虫和病毒等互联网规模流行病的新背景下重新审视。 更广泛的影响是为普适计算环境中的可信计算、通信和存储提供科学基础。 如果SecureCore的体系结构影响到未来值得信赖的商品产品的设计，以及计算机硬件和软件工程教育的课程，那么它的影响将是巨大的。