Collaborative Research: Memory Access Throttling for Highly Multi-Threaded Processors

协作研究：高度多线程处理器的内存访问限制

• 批准号: 0541408
• 负责人: Zhichun Zhu
• 金额: $ 18万
• 依托单位: University of Illinois at Chicago
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2006
• 资助国家: 美国
• 起止时间: 2006-05-01 至 2010-04-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0541408&HistoricalAwards=false
• 关键词: Collaborative; Research; Memory; Access; Throttling

Multicore and multithreaded processors are replacing single-threaded processors in high-performance computer clusters, servers, workstations and high-end personal computers. The memory demand of those processors increases proportionally with the degree of multithreading. The proposed research aims to alleviate the memory bandwidth pressure by using new methods of memory access scheduling and by adjusting multithreaded execution in accordance with memory bandwidth pressure. A set of interdependent and complementary approaches are proposed: Urgency and confidence levels of memory accesses are used to guide the memory access scheduling; memory load index is used to control the progress of multithreaded execution; memory accesses from multiple threads are smoothed out to avoid bandwidth congestion; and several prediction-based techniques are proposed to reduce cache miss penalty in deep cache hierarchies. All together, both the processor computing power and the memory bandwidth will be better utilized; and higher system throughput can be achieved. The proposed research will help high-performance computing applications benefit from the emergence of highly multithreaded processors by alleviating the crucial bottleneck of off-chip memory bandwidth. It will also deepen the understanding of complex interactions between highly multithreaded processors and their memory subsystems, which will complement education in computer architecture and parallel computing.

在高性能计算机集群、服务器、工作站和高端个人计算机中，多核和多线程处理器正在取代单线程处理器。这些处理器的内存需求随着多线程的程度成比例地增加。该研究旨在通过使用新的内存访问调度方法和根据内存带宽压力调整多线程执行来缓解内存带宽压力。提出了一套相互依赖和互补的方法：紧急和信心水平的内存访问被用来指导内存访问调度;内存负载指数被用来控制多线程执行的进展;来自多个线程的内存访问被平滑，以避免带宽拥塞;和几个基于预测的技术，提出了减少缓存未命中惩罚在深缓存层次结构。总的来说，处理器计算能力和存储器带宽将得到更好的利用;并且可以实现更高的系统吞吐量。拟议的研究将有助于高性能计算应用程序受益于高度多线程处理器的出现，通过缓解芯片外存储器带宽的关键瓶颈。它还将加深对高度多线程处理器及其内存子系统之间复杂交互的理解，这将补充计算机体系结构和并行计算方面的教育。