Collaborative Research: FET: Medium:Compact and Energy-Efficient Compute-in-Memory Accelerator for Deep Learning Leveraging Ferroelectric Vertical NAND Memory

合作研究：FET：中型：紧凑且节能的内存计算加速器，用于利用铁电垂直 NAND 内存进行深度学习

• 批准号: 2312884
• 负责人: Kai Ni
• 金额: $ 26.8万
• 依托单位: Rochester Institute of Tech
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2023
• 资助国家: 美国
• 起止时间: 2023-10-01 至 2023-11-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2312884&HistoricalAwards=false
• 关键词: Collaborative; Research; FET; Medium; Compact

The field of artificial intelligence (AI) has recently made significant strides, with notable advancements such as large language models like ChatGPT taking the world by storm. However, these breakthroughs would not have been possible without the availability of powerful computing hardware, such as graphics processing units (GPUs). Such hardware has benefited from several decades of technology scaling following Moore's law. As technology approaches its physical limits and AI models require exponentially increasing hardware resources, including computation and storage, alternative computing paradigms with superior energy efficiency and performance are necessary for a sustainable future. Compute-in-memory is one promising approach where computations are directly performed in memory units, eliminating most data movements, a key bottleneck in conventional computers. However, to best exploit the compute-in-memory for acceleration of AI models on the scale of giga-byte to tera-byte levels, it is critical to have high capacity, energy-efficient, and high performance memory technology to fit the models. NAND memory is a form of erasable programmable read-only memory that takes its name from the not-and (NAND) logic gate. The proposed research aims to develop ferroelectric vertical NAND memory to meet these demands and at the same time train students for developing a future workforce for the semiconductor industry.Vertical NAND memory offers the highest density by increasing the number of stacked layers vertically. However, conventional vertical NAND memory based on floating gate or charge trap flash suffers from poor performance, including high write voltage, low speed, and poor endurance, despite their large capacity. To address these issues, this research proposes the development of a vertical NAND flash alternative: the vertical NAND ferroelectric field-effect transistor (FeFET), which achieves high density and high performance simultaneously. By leveraging the recently discovered ferroelectric HfO2, superior performance can be achieved as ferroelectric programming is driven by an applied electric field, which can be energy-efficient and fast. The project aims to design and evaluate vertical NAND FeFET-based compute-in-memory accelerators from devices to architectures, with innovations such as novel cell designs to achieve multi-level cell and variation suppression, vertical NAND array disturb mitigation with a novel array structure, and mapping and benchmarking of various important information processing tasks to the vertical NAND FeFET array. Additionally, this research includes workforce training activities such as lectures and hands-on experience offered to K-12 students and teachers to promote excitement and attract them to the talent pipeline for the semiconductor industry. The proposed research will recruit graduate and undergraduate students via the Research Experience for Undergraduates (REU) program from underrepresented groups, and the knowledge acquired in this project will be distributed through curriculum development and online sharing repositories.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

人工智能（AI）领域最近取得了重大进展，诸如ChatGPT等大型语言模型的显着进步席卷了世界。然而，如果没有强大的计算硬件，如图形处理单元（GPU），这些突破是不可能的。这种硬件得益于几十年来遵循摩尔定律的技术扩展。随着技术接近其物理极限，人工智能模型需要呈指数级增长的硬件资源，包括计算和存储，具有上级能效和性能的替代计算模式对于可持续的未来是必要的。内存计算是一种很有前途的方法，其中计算直接在内存单元中执行，消除了大多数数据移动，这是传统计算机的关键瓶颈。然而，为了最好地利用内存计算来加速千兆字节到兆字节级别的AI模型，拥有高容量，高能效和高性能的内存技术来适应模型至关重要。NAND存储器是可擦除可编程只读存储器的一种形式，其名称来自非与（NAND）逻辑门。该研究旨在开发铁电垂直NAND存储器，以满足这些需求，同时培养学生为半导体行业培养未来的劳动力。垂直NAND存储器通过增加垂直堆叠层的数量提供最高的密度。然而，基于浮栅或电荷捕获闪存的传统垂直NAND存储器尽管容量大，但性能差，包括高写入电压、低速度和差的耐久性。为了解决这些问题，本研究提出了一种垂直NAND闪存替代方案的开发：垂直NAND铁电场效应晶体管（FeFET），它同时实现了高密度和高性能。通过利用最近发现的铁电HfO 2，可以实现上级性能，因为铁电编程是由所施加的电场驱动的，这可以是能量高效且快速的。该项目旨在设计和评估从器件到架构的基于垂直NAND FeFET的内存计算加速器，其创新包括实现多级单元和变化抑制的新型单元设计，采用新型阵列结构减轻垂直NAND阵列干扰，以及将各种重要信息处理任务映射和基准测试到垂直NAND FeFET阵列。此外，这项研究还包括劳动力培训活动，如为K-12学生和教师提供的讲座和实践经验，以促进兴奋并吸引他们进入半导体行业的人才管道。该研究计划将通过本科生研究经验（REU）计划从代表性不足的群体中招募研究生和本科生，并将在该项目中获得的知识通过课程开发和在线共享库进行分发。该奖项反映了NSF的法定使命，并通过使用基金会的智力价值和更广泛的影响审查标准进行评估，被认为值得支持。