CAREER: Understanding, Estimating, and Reducing Processor Design Complexity

职业：理解、估计和降低处理器设计复杂性

• 批准号: 0546819
• 负责人: Jose Renau
• 金额: $ 40万
• 依托单位: University of California-Santa Cruz
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2006
• 资助国家: 美国
• 起止时间: 2006-03-15 至 2012-02-29
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0546819&HistoricalAwards=false
• 关键词: CAREER; Understanding; Estimating; Reducing; Processor

CAREER: Understanding, Estimating, and Reducing Processor Design Complexity The goal of this CAREER project is to understand, estimate, and reduce processor design complexity. The project will develop three-component complexity metrics for processor design complexity: a procedure to account for the contributions of the different components in the design, accurate statistical regression of experimental measures using a nonlinear mixed-effects model, and a productivity adjustment to account for the productivities of different teams. Once the metrics are developed, new approaches to reduce processor design complexity will be developed.Current development costs for top of the line processors are staggering due to the rapidly-growing complexity of microprocessor design. As larger and more complex processors are designed, it is becoming increasingly difficult to estimate design and verification times. Processor design cost estimation still does not have a quantitative approach, and there is little work on measuring, understanding, and estimating the effort required. The project will address these issues be developing appropriate quantitive metrics.

职业：理解、估计和降低处理器设计复杂性 该职业项目的目标是理解、估计和降低处理器设计复杂性。 该项目将为处理器设计复杂性开发三组件复杂性指标：考虑设计中不同组件的贡献的程序、使用非线性混合效应模型的实验测量的精确统计回归，以及考虑不同团队生产力的生产力调整。 一旦制定了指标，就会开发出降低处理器设计复杂性的新方法。由于微处理器设计复杂性的快速增长，当前顶级处理器的开发成本令人震惊。 随着更大、更复杂的处理器的设计，估计设计和验证时间变得越来越困难。 处理器设计成本估算仍然没有定量方法，并且在测量、理解和估算所需工作量方面几乎没有开展工作。 该项目将通过制定适当的定量指标来解决这些问题。