CAREER: Understanding, Estimating, and Reducing Processor Design Complexity
CAREER: Understanding, Estimating, and Reducing Processor Design Complexity
批准号:
0546819
负责人:
Jose Renau
金额:
$40.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2006
资助国家:
美国
项目状态:
已结题
起止时间:
2006-03-15 至 2012-02-29
中文摘要
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英文摘要
CAREER: Understanding, Estimating, and Reducing Processor Design Complexity The goal of this CAREER project is to understand, estimate, and reduce processor design complexity. The project will develop three-component complexity metrics for processor design complexity: a procedure to account for the contributions of the different components in the design, accurate statistical regression of experimental measures using a nonlinear mixed-effects model, and a productivity adjustment to account for the productivities of different teams. Once the metrics are developed, new approaches to reduce processor design complexity will be developed.Current development costs for top of the line processors are staggering due to the rapidly-growing complexity of microprocessor design. As larger and more complex processors are designed, it is becoming increasingly difficult to estimate design and verification times. Processor design cost estimation still does not have a quantitative approach, and there is little work on measuring, understanding, and estimating the effort required. The project will address these issues be developing appropriate quantitive metrics.
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