CCF: Medium: Collaborative Research: SHF: Cascode: Supporting and Leveraging Voltage Stacking in Future Microprocessors

CCF：中：协作研究：SHF：共源共栅：支持和利用未来微处理器中的电压堆叠

• 批准号: 1514284
• 负责人: Jose Renau
• 金额: $ 28.5万
• 依托单位: University of California-Santa Cruz
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2015
• 资助国家: 美国
• 起止时间: 2015-06-15 至 2019-12-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1514284&HistoricalAwards=false
• 关键词: CCF; Medium; Collaborative; Research; SHF

Power dissipation is increasingly becoming the central issue in almost all computing and communication systems from mobile devices to warehouse-scale systems. This project investigates a technology that can shave off at least a few percent of chip energy of all chips by targeting one particular aspect of power consumption that has not received as much attention as others: power delivery. In addition to the team of investigators, the project will involve graduate and undergraduate students, include members of underrepresented groups and will thus help enlarge the nation?s workforce in information technologies.Today's chips operate at low voltages (about 1V) to reduce power consumption. However, delivering the power at low voltage is problematic. For instance, it results in more delivery loss (in the real world, electricity is transported at voltages thousands of times higher than that of the usage voltage). This project will be investigating a solution called the Cascode power delivery system, which stacks multiple planes of circuit to naturally increase the effective usage (and therefore delivery) voltage. This design is not only likely to bypass some fundamental problems with other means of increasing power delivery voltage (such as using on-chip voltage converters), but also to creates new architectural opportunities such as improved communication circuits with higher voltages and better capabilities to compensate variations in the fabrication process.

在从移动的设备到仓库规模的系统的几乎所有计算和通信系统中，功耗正日益成为中心问题。该项目研究了一种技术，该技术可以通过针对功耗的一个特定方面来削减所有芯片的至少百分之几的芯片能量，该方面尚未受到其他方面的关注：功率传输。除了调查小组，该项目将涉及研究生和本科生，包括代表性不足的群体的成员，从而有助于扩大国家？今天的芯片工作在低电压（约1V），以减少功耗。然而，在低电压下输送电力是有问题的。例如，它导致更多的输送损耗（在真实的世界中，电力以比使用电压高数千倍的电压输送）。该项目将研究一种名为共源共栅功率传输系统的解决方案，该系统将多个电路平面堆叠在一起，自然地增加有效使用（因此也增加了传输）电压。这种设计不仅可能通过增加功率输送电压的其他手段（例如使用片上电压转换器）来绕过一些基本问题，而且还创造了新的架构机会，例如具有更高电压和更好能力的改进的通信电路，以补偿制造过程中的变化。