CCF: Medium: Collaborative Research: SHF: Cascode: Supporting and Leveraging Voltage Stacking in Future Microprocessors

从移动设备到仓库规模的系统，几乎所有的计算和通信系统的功耗都日益成为中心问题。这个项目研究了一种技术，它可以通过针对功耗的一个特定方面来削减至少百分之几的芯片能量，而这个方面并没有像其他方面那样受到那么多的关注：电力输送。除了调查小组，该项目还将涉及研究生和本科生，包括代表性不足的群体的成员，从而有助于扩大国家？美国在信息技术方面的劳动力。今天的芯片工作在低电压（约1V），以减少功耗。然而，在低电压下传输电力是有问题的。例如，它会导致更多的传输损耗（在现实世界中，电力在比使用电压高数千倍的电压下传输）。该项目将研究一种名为Cascode的电力输送系统的解决方案，该系统将多个电路平面堆叠起来，以自然地增加有效使用（从而增加输送）电压。这种设计不仅有可能绕过其他增加电力输送电压的方法（如使用片上电压转换器）的一些基本问题，而且还创造了新的架构机会，如改进的通信电路具有更高的电压和更好的能力，以补偿制造过程中的变化。

Power dissipation is increasingly becoming the central issue in almost all computing and communication systems from mobile devices to warehouse-scale systems. This project investigates a technology that can shave off at least a few percent of chip energy of all chips by targeting one particular aspect of power consumption that has not received as much attention as others: power delivery. In addition to the team of investigators, the project will involve graduate and undergraduate students, include members of underrepresented groups and will thus help enlarge the nation?s workforce in information technologies.Today's chips operate at low voltages (about 1V) to reduce power consumption. However, delivering the power at low voltage is problematic. For instance, it results in more delivery loss (in the real world, electricity is transported at voltages thousands of times higher than that of the usage voltage). This project will be investigating a solution called the Cascode power delivery system, which stacks multiple planes of circuit to naturally increase the effective usage (and therefore delivery) voltage. This design is not only likely to bypass some fundamental problems with other means of increasing power delivery voltage (such as using on-chip voltage converters), but also to creates new architectural opportunities such as improved communication circuits with higher voltages and better capabilities to compensate variations in the fabrication process.