CSR: Small: Rethinking the Memory Hierarchy

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Modern multicores are designed around complex memory hierarchies thatachieve high performance with a high cost in design complexity andefficiency. The reason is that delaying the memory access just a fewcycles has an unacceptable performance impact. This proposal decouplesthe memory operations in non-critical and critical. The criticalcomponent is allowed to be incorrect which results in a system withpower savings, simplifications in the memory hierarchy, and even theremoval of complex memory coherence. The proposed sequentialconsistency model allows simple programming models without performanceor power consumption impact.This proposal addresses the challenge of excessive complexity in modernmulticore memory hierarchy. This complexity results in a power waste anddifficult programming models. For modern systems, the memory hierarchyrepresents over half of the power. The proposed decoupled executionallows an energy efficient implementation by moving the complexoperations out of the critical path. Furthermore, the proposed memoryhierarchy allows for simpler parallel applications because it avoidscomplex consistency models commonly used. This proposal solution allowsfor an efficient implementation of the simplest consistency modelavailable. Overall, the PI hopes to make fundamental advances towardenergy efficient and simpler to use memory hierarchies.