SGER: Fast and Scalable Simulation for Multicore and Multithreaded Processor by Using Commodity FPGA Boards

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Intellectual MeritWe propose an exploratory project to build a fast and scalable architectural simulationplatform using clusters of commodity FPGA boards. It is inherently parallel: A FPGA board simulates aprocessor core, a group of FPGA boards simulates a multicore processor chip, and a cluster of such groupssimulates a full computing cluster. By careful analysis using the performance data of Xilinx FPGA board,we show that the slowdown will be less than two orders of magnitude, which makes full-scale evaluationfeasible.By comparison, the slowdown of a software simulator will be at least five orders of magnitude. Thesystem is scalable in that one can increase the system size by adding more FPGA boards. The platform isalso affordable, flexible, and easy to replicate, and can be widely used by industry and academic researchers.Boarder ImpactHigh Performance computing applications have deep impact in our daily life and their computing demand would never be fully satisfied. However, without a fast simulation platform, multicore and multithreaded processors are not being evaluated by large-scale parallel programs until they have been manufactured. The proposed research removes this limit. It will prompt early consideration and evaluation of system-level methods for improving processor efficiency, providing important input to computer architects.Thus, it may help reduce the trials and errors that would be very expensive and would delay theimprovement of high performance computing systems. The proposed experiment support will benefit otherresearchers in both computer architecture and high-performance computing communities, and help them seethe needs of each other before the real machines are available.