CSR -- EHS: Standard Binaries for FPGAs: Separating Function and Architecture in Modern Embedded Computing Platforms
CSR -- EHS: Standard Binaries for FPGAs: Separating Function and Architecture in Modern Embedded Computing Platforms
批准号:
0614957
负责人:
Frank Vahid
金额:
$0.0万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2006
资助国家:
美国
项目状态:
已结题
起止时间:
2006-07-01 至 2011-06-30
中文摘要
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英文摘要
Vahid abstractThis project is defining basic concepts for FPGA standard binaries, and developing techniques to support those concepts. FPGAs are a relatively new category of programmable chip that can implement a user-specified circuit, in contrast to programmable microprocessor chips that implement user-specified sequential instructions. Because circuits consist of thousands of concurrently-executing components rather than sequentially-executing instructions, circuits may execute certain embedded system applications thousands of times faster than microprocessors. Because FPGAs are programmable like microprocessors, configured just by downloading a bitfile, FPGAs reduce engineering costs by orders of magnitude compared to circuit-implementation chip technologies that require manufacturing of custom or semi-custom chips, and support downloading of new circuits even after deployed in a final product. Yet in contrast to microprocessors, FPGAs today lack a concept of standard binary, a bitfile that can be ported without modification to different programmable chips. For microprocessors, standard binaries would enable an ecosystem among developers of architectures, applications, and tools, that catalyzes the development of those three items. This project seeks to define device-independent binaries for circuits, called spatial binaries. It develops techniques that use on-chip design automation tools to dynamically map a spatial binary onto any particular FPGA architecture. It develops methods like circuit swapping and circuit re-synthesis to map large circuits onto smaller FPGAs, and develops methods like circuit recompilation and circuit emulation to implement circuits on microprocessors when FPGA resources are unavailable. The project defines concepts for hybrid binaries supporting both temporal and spatial description, and develops exploration techniques to effectively map hybrid binaries onto particular chips having both microprocessors and FPGAs. Standard FPGA binaries are expected to lead to higher-quality, more robust, more reliable FPGA-based embedded computing applications, due to the longer lifetime and wider distribution of applications, which justify larger investment by the application developer.
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