CSR -- EHS: Standard Binaries for FPGAs: Separating Function and Architecture in Modern Embedded Computing Platforms

Vahid abstract该项目定义FPGA标准二进制文件的基本概念，并开发支持这些概念的技术。FPGA是一种相对较新的可编程芯片，它可以实现用户指定的电路，而可编程微处理器芯片则实现用户指定的顺序指令。由于电路由数千个并发执行的组件而不是顺序执行的指令组成，因此电路可以比微处理器快数千倍地执行某些嵌入式系统应用。由于FPGA与微处理器一样是可编程的，只需通过下载位文件进行配置，因此与需要制造定制或半定制芯片的电路实现芯片技术相比，FPGA可将工程成本降低几个数量级，并且即使在最终产品中部署后也支持下载新电路。 然而，与微处理器相比，今天的FPGA缺乏标准二进制的概念，一个可以在不修改的情况下移植到不同可编程芯片的位文件。对于微处理器来说，标准二进制文件将在架构、应用程序和工具的开发人员之间形成一个生态系统，促进这三个项目的开发。该项目旨在为电路定义与设备无关的二进制，称为空间二进制。它开发了使用片上设计自动化工具将空间二进制动态映射到任何特定FPGA架构的技术。它开发了电路交换和电路重新合成等方法，将大型电路映射到较小的FPGA上，并开发了电路重新编译和电路仿真等方法，以便在FPGA资源不可用时在微处理器上实现电路。该项目定义了支持时间和空间描述的混合二进制的概念，并开发了探索技术，以有效地将混合二进制映射到具有微处理器和FPGA的特定芯片上。 标准的FPGA二进制文件预计将导致更高质量，更强大，更可靠的基于FPGA的嵌入式计算应用程序，由于更长的寿命和更广泛的应用程序分布，这证明了应用程序开发人员的更大投资。

Vahid abstractThis project is defining basic concepts for FPGA standard binaries, and developing techniques to support those concepts. FPGAs are a relatively new category of programmable chip that can implement a user-specified circuit, in contrast to programmable microprocessor chips that implement user-specified sequential instructions. Because circuits consist of thousands of concurrently-executing components rather than sequentially-executing instructions, circuits may execute certain embedded system applications thousands of times faster than microprocessors. Because FPGAs are programmable like microprocessors, configured just by downloading a bitfile, FPGAs reduce engineering costs by orders of magnitude compared to circuit-implementation chip technologies that require manufacturing of custom or semi-custom chips, and support downloading of new circuits even after deployed in a final product. Yet in contrast to microprocessors, FPGAs today lack a concept of standard binary, a bitfile that can be ported without modification to different programmable chips. For microprocessors, standard binaries would enable an ecosystem among developers of architectures, applications, and tools, that catalyzes the development of those three items. This project seeks to define device-independent binaries for circuits, called spatial binaries. It develops techniques that use on-chip design automation tools to dynamically map a spatial binary onto any particular FPGA architecture. It develops methods like circuit swapping and circuit re-synthesis to map large circuits onto smaller FPGAs, and develops methods like circuit recompilation and circuit emulation to implement circuits on microprocessors when FPGA resources are unavailable. The project defines concepts for hybrid binaries supporting both temporal and spatial description, and develops exploration techniques to effectively map hybrid binaries onto particular chips having both microprocessors and FPGAs. Standard FPGA binaries are expected to lead to higher-quality, more robust, more reliable FPGA-based embedded computing applications, due to the longer lifetime and wider distribution of applications, which justify larger investment by the application developer.