CSR -- EHS: Standard Binaries for FPGAs: Separating Function and Architecture in Modern Embedded Computing Platforms

CSR - EHS：FPGA 标准二进制文件：现代嵌入式计算平台中的功能和架构分离

• 批准号: 0614957
• 负责人: Frank Vahid
• 金额: --
• 依托单位: University of California-Riverside
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2006
• 资助国家: 美国
• 起止时间: 2006-07-01 至 2011-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0614957&HistoricalAwards=false
• 关键词: CSR; EHS; Standard; Binaries; FPGAs

Vahid abstractThis project is defining basic concepts for FPGA standard binaries, and developing techniques to support those concepts. FPGAs are a relatively new category of programmable chip that can implement a user-specified circuit, in contrast to programmable microprocessor chips that implement user-specified sequential instructions. Because circuits consist of thousands of concurrently-executing components rather than sequentially-executing instructions, circuits may execute certain embedded system applications thousands of times faster than microprocessors. Because FPGAs are programmable like microprocessors, configured just by downloading a bitfile, FPGAs reduce engineering costs by orders of magnitude compared to circuit-implementation chip technologies that require manufacturing of custom or semi-custom chips, and support downloading of new circuits even after deployed in a final product. Yet in contrast to microprocessors, FPGAs today lack a concept of standard binary, a bitfile that can be ported without modification to different programmable chips. For microprocessors, standard binaries would enable an ecosystem among developers of architectures, applications, and tools, that catalyzes the development of those three items. This project seeks to define device-independent binaries for circuits, called spatial binaries. It develops techniques that use on-chip design automation tools to dynamically map a spatial binary onto any particular FPGA architecture. It develops methods like circuit swapping and circuit re-synthesis to map large circuits onto smaller FPGAs, and develops methods like circuit recompilation and circuit emulation to implement circuits on microprocessors when FPGA resources are unavailable. The project defines concepts for hybrid binaries supporting both temporal and spatial description, and develops exploration techniques to effectively map hybrid binaries onto particular chips having both microprocessors and FPGAs. Standard FPGA binaries are expected to lead to higher-quality, more robust, more reliable FPGA-based embedded computing applications, due to the longer lifetime and wider distribution of applications, which justify larger investment by the application developer.

Vahid Abstractthis项目正在定义FPGA标准二进制文件的基本概念，并开发了支持这些概念的技术。 FPGA是可以实现用户指定电路的可编程芯片的相对较新的类别，与实现用户指定的顺序指令的可编程微处理器芯片相比。由于电路由成千上万的同时执行组件而不是依次执行指令组成，因此电路可能比微处理器更快地执行某些嵌入式系统应用程序。由于FPGA像微处理器一样可编程，仅通过下载BitFile即可配置，因此与需要自定义或半定期芯片制造的电路实施芯片技术相比，FPGA通过数量级降低工程成本，并支持即使在最终产品中部署新通电机的下载。 然而，与微处理器相反，如今的FPGA缺乏标准二进制的概念，标准二进制文件可以放置，而无需修改不同的可编程芯片。对于微处理器而言，标准二进制文件将在体系结构，应用程序和工具开发者之间实现生态系统，从而促进这三个项目的开发。该项目旨在定义与设备无关的二进制电路，称为空间二进制文件。它开发了使用片上设计自动化工具将空间二进制映射到任何特定FPGA体系结构的技术。它开发了诸如电路交换和电路重新合成之类的方法，以将大电路映射到较小的FPGA上，并开发出电路重新编译和电路仿真等方法，以在FPGA资源不可用时在微处理器上实现电路。该项目定义了支持时间和空间描述的混合二进制文件的概念，并开发了勘探技术，以有效地将混合二进制文件映射到具有微处理器和FPGA的特定芯片上。 由于寿命更长和应用程序的分布更长，因此预计标准的FPGA二进制文件将导致更高质量，更健壮，更可靠的基于FPGA的嵌入式计算应用程序，这证明了应用程序开发人员的更大投资。