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Collaborative Research: CT-T: Manufacturing Variability-based Hardware Protection Techniques

Collaborative Research: CT-T: Manufacturing Variability-based Hardware Protection Techniques
合作研究:CT-T:基于制造变异性的硬件保护技术
批准号:
0716674
负责人:
Farinaz Koushanfar
金额:
$5.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2007
资助国家:
美国
项目状态:
已结题
起止时间:
2007-10-01 至 2008-09-30

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中文摘要
翻译
据估计,硬件(HW)知识产权盗版引起的损失几乎比软件盗版成本高一个数量级,并且极大地促进了软件和娱乐数据的盗版。 此外,硬件漏洞可被用于安全攻击,特别是由于业务模式转移到外部铸造厂和装配厂,硬件恶意软件攻击(恶意或无意更改设计规范,在特定条件下损害功能的正确性)的威胁日益增加。该项目的战略目标是通过多管齐下的攻击,包括开发概念基础和几种实用的硬件保护技术,推动对硬件恶意软件攻击和盗版的保护研究。该项目的智力价值是开发利用制造可变性(MV)的硬件保护技术。这是现代制造工艺中所固有的,并导致每个制造的集成电路(IC)的唯一性。该项目正在开发:(i)在关于MV的非常温和的统计假设下仅考虑单个IC的HW恶意软件检测技术,以及(ii)主动硬件计量协议,通过将MV集成到目标设计的功能中,防止代工厂分发未经授权的设计副本,以这种方式,只有设计师才能在通电后发出解锁设计的密钥,以便其发挥功能。它将成为一个新行业的基础,确保在复杂的横向IC商业模式中的硬件完整性。此外,这个项目是暴露本科生和研究生对这些日益重要的课题,并为代表性不足的学生提供研究机会。
英文摘要
It is estimated that hardware (HW) intellectual property piracy induces almost an order of magnitude higher loss when compared to software piracy cost and greatly facilitates both software and entertainment data piracy. In addition, HW vulnerabilities can be exploited for security attacks, especially the increasing threat of HW malware attacks (malicious or unintentional alterations of design specifications that compromise the correctness of the functionality under specific conditions) due to business models moving to external foundries and assembly houses. The strategic objective of this project is to give impetus to research on the protection against HW malware attacks and piracy with a multi-pronged attack that includes the development of both the conceptual foundation and several practical HW protection techniques.The intellectual merit of this project is the development of HW protection techniques that leverage the manufacturing variability (MV) inherent in modern fabrication processes and the resulting uniqueness of every manufactured integrated circuit (IC). This project is developing: (i) HW malware detection techniques considering only a single IC under very mild statistical assumptions about MV, and (ii) active HW metering protocols that prevent foundries from distributing unauthorized design copies by integrating MV into the functionality of the targeted design in such a way that only the designer can issue a key that unlocks the design after power up so that it becomes functional.The broader impacts of this project are that it will form the basis for a new industry that ensures HW integrity in a complex horizontal IC business model. In addition, this project is exposing both undergraduate and graduate students to these increasingly important topics and providing research opportunities for underrepresented students.
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