CAREER: Nano-Centric Design Methodology for Nanoscale FPGAs

摘要：由于基本的物理和经济限制，传统的自顶向下制造面临着严峻的挑战。自下而上的方法，集成功能器件结构由化学合成的纳米级构建块组装而成，如碳纳米管（CNT）和纳米线，有可能彻底改变未来电子系统的制造。这种纳米系统本质上结构非常规则，因此适合于类似于现场可编程门阵列（fpga）的实现。纳米电子电路总是有一定比例的缺陷，以及在光刻引入的工艺变化之外的纳米材料特有的变化。采用简化的纳米器件假设和传统的规模设计流程将导致不理想和不切实际的纳米pga设计和不准确的系统评估结果。为了让纳米技术实现它的承诺，我们需要理解和整合纳米特定的设计技术，比如纳米系统建模、统计方法和容错设计，系统地从设备一直到系统。基于这一观察结果，本CAREER计划为纳米级fpga提出了一种基本的、系统的、以纳米为中心的设计方法。该方案包括以下四个方面的集成设计：1)模式设计：设计新颖可靠的架构模式，例如基于碳纳米管的一次性可配置FPGA；2)建模：考虑纳米材料的特定变化、制造限制和缺陷，开发新的器件/导线/电路模型；3)合成：从行为层面到物理设计层面，关注以纳米为中心的新型合成技术；4)评价：构建了一种新的参数化纳米of pga评价/勘探引擎NanoEngine。PI计划开发一门新的跨学科课程，包括纳米材料制造、纳米电子原理、可编程集成电路和CAD。PI已经并将继续通过简短的系列讲座、工程开放日和IEEE在职教师计划向K-12学生提供微/纳米电子学教育。他还将与大学组织（如Women in Engineering）合作，增加代表性不足的群体，尤其是女学生的参与。这个项目特别吸引本科生，他们被新技术所吸引，可能成为纳米电子行业的未来领导者。

CCF - 0746608 PI name: Deming ChenTitle: CAREER: Nano-Centric Design Methodology for Nanoscale FPGAsInstitution: University of Illinois at Urbana ChampaignABSTRACT:Conventional top-down manufacturing faces serious challenges due to fundamental physical and economical constraints. Bottom-up approaches, in which integrated functional device structures are assembled from chemically synthesized nanoscale building blocks, such as carbon nanotubes (CNT) and nanowires, have the potential to revolutionize the fabrication of electronic systems for the future. Such nanosystems are by their nature very regular in structure and, therefore, suitable to implementation similar to Field Programmable Gate Arrays (FPGAs). Nanoelectronic circuits always have a certain percentage of defects as well as nanomaterial-specific variations over and above process variations introduced by lithography. Using simplified nanodevice assumptions and traditional scaled design flows will lead to suboptimal and impractical nanoFPGA designs and inaccurate system evaluation results. For nanotechnology to fulfill its promise, we need to understand and incorporate nano-specific design techniques, such as nanosystems modeling, statistical approaches and fault tolerant design, systematically from devices all the way up to systems. Motivated by this observation, this CAREER program proposes a fundamental, systematic and nano-centric design methodology for nanoscale FPGAs. The proposal includes the following four integrated design aspects: 1) Patterning: Designs novel and reliable architecture patterns, such as a new CNT-based one-time-configurable FPGA; 2) Modeling: Develops new device/wire/circuit models considering nanomaterial-specific variations, manufacturing limitations, and defects; 3) Synthesizing: Focuses on novel nano-centric synthesis techniques from the behavior level down to the physical design level; and 4) Evaluating: Builds a new parameterized nanoFPGA evaluation/exploration engine NanoEngine. The PI plans to develop a new interdisciplinary course incorporating nanomaterials fabrication, nanoelectronic principles, programmable ICs, and CAD. The PI has worked and will continue to reach out to K-12 students for micro/nano electronics education through short lecture series, Engineering Open House, and IEEE Teacher In-Service programs. He will also work with university organizations, such as Women in Engineering, to increase the participation of under-represented groups, especially female students. This project is especially compelling to undergraduate students, who are attracted to new technologies and may become the future leaders of nanoelectronic industry.