CAREER: Holistic Computer Architectures for Nanoscale Processors

可以说，技术扩展是微处理器计算能力提高的最重要因素，并间接影响了现代生活的许多方面。持续技术扩展所面临的最重要的挑战之一是设备特性的不断变化，即工艺变化。工艺变化表现为制造的处理器在性能、功率和可靠性方面的波动。为了减轻这些影响，这个CAREER程序开发了利用？整体优化?，也就是说，这个项目研究的技术，同时考虑各种计算抽象层次。这类技术的两个有趣的例子是考虑经济激励来度量体系结构的质量，以及优化用户感知的性能以提高生命周期可靠性。此外，本项目还研究了替补组件和模块化架构的开发。替补组件是一种结构，可以替代芯片中出现故障的部分，而模块化架构是使用少量类似结构构建的处理器，这些结构可以动态分配。这些研究任务有可能对学术和工业研究产生重大影响。工艺变化给所有处理器制造商带来了巨大的问题，应该详细了解它们日益增长的影响。此外，越来越需要了解不同的体系结构如何影响处理器制造商的总体目标以及这些处理器的用户。这样的理解将在本项目中得到发展，然后可以用于构建更高效的处理器。

Technology scaling has arguably been the most important contributor to the increase in the computational power in microprocessors and indirectly affects many aspects of modern life. One of the most important challenges facing continued technology scaling is the increasing variability in device characteristics, i.e., process variations. Process variations manifest themselves as fluctuations in performance, power, and reliability of manufactured processors. To mitigate these effects, this CAREER program develops variation-tolerant architectures that utilize ?holistic optimizations?, i.e., this project studies techniques that simultaneously consider various computational abstraction levels. The two intriguing examples of such techniques are the consideration of economical incentives to measure the quality of architectures and optimizing for user-perceived performance to increase lifetime reliability. In addition, this project studies the development of understudy components and modular architectures. Understudy components are structures that can replace parts of the chips that fail, whereas modular architectures are processors built using a small variety of similar structures that can be dynamically allocated. These research tasks have the potential of having a large impact on both academic and industrial research. Process variations cause immense problems to all processor manufacturers and their rising impact should be understood in detail. In addition, there is a growing need to understand how different architectures affect the overall targets of the processor manufacturers as well as the users of these processors. Such an understanding, which will be developed in this project, can then be used to architect much more efficient processors.