I/UCRC Proposal For University Site At Virginia Tech: Center For High-Performance Reconfigurable Computing (CHREC)

I/UCRC 关于弗吉尼亚理工大学站点的提案:高性能可重构计算中心 (CHREC)

基本信息

项目摘要

This award establishes Virginia Polytechnic Institute as a research site of the Industry/University Collaborative Research Center (IUCRC) for High-Performance Reconfigurable Computing. Other sites of this collaborative research center include the University of Florida (2007), George Washington University (2007), and Brigham Young University (2008). Reconfigurable computing (RC) technology can be divided into two areas of use: High Performance Computing (HPC) and High Performance Embedded Computing (HPEC). RC technology is used in the field of HPC to accelerate demanding computations that would otherwise be performed in software on a large-scale computing system. RC technology is used in HPEC to create high-performance embedded computing solutions in areas such as signal and image processing, real-time vision, cryptography, and network processing. The mission of this center is to investigate, develop, and evaluate new concepts, methods, infrastructure, and tools in reconfigurable HPC and HPEC, from building-block devices to infrastructure to applications, and advance these technologies through research and education for the benefit of center members, students, and the discipline at large. The research BYU will address; 1) Novel Core Architectures and Related Components for Aerospace & Defense Applications, 2) Application Mapping of HPC Codes to High-Performance Reconfigurable Computing Systems, 3) Profiling, Analysis, & Performance Optimization for Reconfigurable Computing Applications, 4) Middleware, Interfaces, & other Infrastructure for High-Performance Reconfigurable Computers. The Center for High-Performance Reconfigurable Computing should significantly enhance the U.S. effort to maintain a strong leadership position within their area of information technology. It may also serve to bring industry and users together to define common standards. Industry members, researchers and students will gain from the interactions throughout the life of the research center. Advances in RC affect virtually all disciplines of science and engineering which require high-performance computing, be it mainframe-oriented or embedded. RC technology promises to produce computing systems combining the flexibility of software-programmable computations with the computational power of custom hardware.
该奖项将弗吉尼亚理工学院确立为高性能可重构计算的工业/大学合作研究中心(IUCRC)的研究中心。该合作研究中心的其他站点包括佛罗里达大学(2007年)、乔治华盛顿大学(2007年)和杨百翰大学(2008年)。可重构计算(RC)技术可以分为两个用途:高性能计算(HPC)和高性能嵌入式计算(HPEC)。RC技术用于高性能计算领域,以加速原本在大规模计算系统上的软件中执行的高要求计算。RC技术在HPEC中用于创建信号和图像处理、实时视觉、密码学和网络处理等领域的高性能嵌入式计算解决方案。该中心的使命是研究、开发和评估可重构HPC和HPEC中的新概念、方法、基础设施和工具,从构建块设备到基础设施再到应用程序,并通过研究和教育来推进这些技术,以造福中心成员、学生和整个学科。杨百翰大学的研究将解决:1)航空航天国防应用的新型核心架构和相关组件,2)HPC代码到高性能可重构计算系统的应用映射,3)可重构计算应用的分析,分析,性能优化,4)中间件,接口,高性能可重构计算机的其他基础设施。高性能可重构计算中心应该大大加强美国在信息技术领域保持强大领导地位的努力。它还可以使工业界和用户共同确定共同的标准。行业成员、研究人员和学生将从研究中心整个生命周期的互动中获益。RC的进步影响了几乎所有需要高性能计算的科学和工程学科,无论是面向大型机还是嵌入式。RC技术有望生产出将软件可编程计算的灵活性与定制硬件的计算能力相结合的计算系统。

项目成果

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Peter Athanas其他文献

Context Switching in a Run-Time Reconfigurable System
  • DOI:
    10.1023/a:1025694914489
  • 发表时间:
    2003-01-01
  • 期刊:
  • 影响因子:
    2.700
  • 作者:
    Kiran Puttegowda;David I. Lehn;Jae H. Park;Peter Athanas;Mark Jones
  • 通讯作者:
    Mark Jones
Data staging for efficient high throughput stream processing
  • DOI:
    10.1016/j.parco.2019.102566
  • 发表时间:
    2019-12-01
  • 期刊:
  • 影响因子:
  • 作者:
    Thaddeus Koehn;Peter Athanas
  • 通讯作者:
    Peter Athanas

Peter Athanas的其他文献

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{{ truncateString('Peter Athanas', 18)}}的其他基金

Collaborative Research: Phase-II Renewal of CHREC Center at Virginia Tech
合作研究:弗吉尼亚理工大学 CHREC 中心二期更新
  • 批准号:
    1266245
  • 财政年份:
    2013
  • 资助金额:
    $ 25万
  • 项目类别:
    Continuing Grant
IEEE Workshop on FPGAs for Custom Computing Machines: Processors, Programming and Applications; April 5-7, 1993; Napa, California
IEEE 定制计算机 FPGA 研讨会:处理器、编程和应用;
  • 批准号:
    9306310
  • 财政年份:
    1993
  • 资助金额:
    $ 25万
  • 项目类别:
    Standard Grant
RIA: An Architecture and Compiler for Adaptive Computing
RIA:自适应计算的架构和编译器
  • 批准号:
    9308390
  • 财政年份:
    1993
  • 资助金额:
    $ 25万
  • 项目类别:
    Standard Grant

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