SBIR Phase I: Atmospheric Pressure Deep Etch for MEMS Manufacturing and Integration

这个小型企业创新研究(SBIR)第一阶段项目将开发一种在硅中形成贯通晶片的新方法。MEMS和CMOS器件的垂直堆叠正变得越来越流行，以增加功能密度，并将专门的微电子机械系统(MEMS)与标准硅集成电路相结合。垂直堆叠通常要求使用各向异性蚀刻通过晶片形成用于接触的通孔，但目前用于执行这一步骤的低压技术缓慢且昂贵。该项目将把S公司独有的线性感应等离子体管技术应用于硅刻蚀中，采用当前的多步(刻蚀/钝化)方法和单步刻蚀。大气压下增加的物种密度应该能够钝化和刻蚀高纵横比特征，而不会在低压下观察到刻蚀停止行为，并且低电子温度确保最小的等离子体损害。如果成功，这样的工具将极大地降低通孔制造的成本，并在否则将是令人望而却步的昂贵的应用中实现电路的3D堆叠。常压等离子蚀刻工艺的独特特性使其能够设计出低成本、高产量和高性能的加工工具。由于气体流动可以用来定义反应区域，因此晶片可以使用旋转木马类型的体系结构以高速率批量暴露于多个工艺步骤。一旦被证明是一种半导体制造工具，线性感应等离子体管可能会在半导体制造、光伏制造以及其他依赖于薄膜沉积和蚀刻工艺的高速、低成本加工中找到其他应用。

This Small Business Innovation Research (SBIR) Phase I project will develop a novel approach to through-wafer via formation in silicon. Vertical stacking of MEMS and CMOS devices is becoming increasingly popular for increasing functional density, and for combining specialized microelectromechanical systems (MEMS) with standard silicon integrated circuits. Vertical stacking generally requires that via holes for contacts be formed through a wafer using anisotropic etching, but current low-pressure techniques for performing this step are slow and expensive. This project will apply the company?s unique Linear Inductive Plasmatron technology to silicon etching using both the current multistep (etch/passivation) approach and single-step etching. The increased species densities at atmospheric pressure should enable passivation and etching of high-aspect-ratio features without etch-stop behavior observed at low pressure, and low electron temperatures ensure minimal plasma damage.If successful such a tool will greatly reduce the cost of via fabrication and enable 3D stacking of circuitry in applications where it would otherwise be prohibitively expensive. The unique characteristics of an atmospheric-pressure plasma etch process allow design of a processing tool that combines low cost, high throughput, and high performance. Because gas flows can be used to define reaction regions, wafers can be exposed to multiple process steps at high rates in batches using a carousel-type architecture. Once proven as a semiconductor manufacturing tool, the Linear Inductive Plasmatron is likely to find other applications in high-rate, low-cost processing for semiconductor fabrication, photovoltaic fabrication, and other manufacturing dependent on thin film deposition and etch processes.