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CSR: Small: Data-Adaptable Reconfigurable Embedded Systems (DARES)

CSR: Small: Data-Adaptable Reconfigurable Embedded Systems (DARES)
CSR:小型:数据适应性可重配置嵌入式系统 (DARES)
批准号:
0915010
负责人:
Roman Lysecky
金额:
$46.94万
依托单位:
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2009
资助国家:
美国
项目状态:
已结题
起止时间:
2009-08-15 至 2013-07-31

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中文摘要
翻译
该奖项是根据2009年美国复苏和再投资法案(公法111-5)资助的。应用程序复杂性的显著增加要求处理要求超过使用仅软件实现的当前处理器可实现的性能。例如,最近的多媒体标准,例如JPEG 2000,与以前的标准相比,已经显著增加了计算需求。为了减轻开发能够完全支持这些标准的软件和/或硬件解决方案的成本,许多人定义了几个配置文件?各种可配置参数的具体设置?这降低了实现特定配置文件所需的复杂程度。然而,即使在一个单一的域的配置文件的数量和变化仍然排除了传统的硬件实现作为一个可行的选择,为大多数application.The数据自适应可重构嵌入式系统(DARES)项目的重点是开发硬件/软件协同设计和数据自适应驱动的可重构计算方法。这种数据自适应方法允许设计人员直接对应用程序的数据可配置性进行建模,从而实现可以在运行时基于传入数据的配置文件动态重新配置的解决方案。DARES项目将捕获数据配置空间的建模技术与新的硬件/软件协同设计技术相结合,直接从数据/应用模型合成可重配置电路和通信资源。由此产生的硬件/软件实现提供了软件的灵活性与硬件的性能。DARES项目的结果将提供一种新的设计方法,用于处理具有越来越大的灵活性和可配置性的应用程序的趋势,并将提供新的方法,用于利用FPGA的可重构性超越目前的方法。
英文摘要
This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5). Significant increases in application complexity demand processing requirements that exceed the performance achievable by current processors using software only implementations. For example, recent multimedia standards, such as JPEG2000, have significantly increased computational demands compared to previous standards. In an effort to alleviate the cost of developing software and/or hardware solutions capable of fully supporting such standards, many define several profiles ? specific settings for various configurable parameters ? that reduce the level of complexity needed to implement a specific profile. However, the number and variability of profiles even within a single domain still precludes traditional hardware implementations as a viable option for most applications.The Data-Adaptable Reconfigurable Embedded Systems (DARES) project focuses on developing hardware/software codesign and reconfigurable computing methodologies driven by data-adaptability. This data-adaptable approach allows designers to directly model data configurability of an application, thereby enabling a solution that can be dynamically reconfigured at runtime based on the profile of incoming data. The DARES project combines modeling techniques for capturing the data configuration space with new hardware/software codesign techniques to synthesize reconfigurable circuits and communication resources directly from the data/application model. The resulting hardware/software implementation provides the flexibility of software with the performance of hardware.The results of the DARES project will provide a new design approach for dealing with the trend towards applications with increasing flexibility and configurability and will provide new methodologies for exploiting the reconfigurability of FPGAs beyond current approaches.
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