STTR Phase II: Blended Clocked and Clockless Integrated Circuit Systems

STTR 第二阶段：混合时钟和无时钟集成电路系统

• 批准号: 0924010
• 负责人: Jerome Cox
• 金额: $ 49.98万
• 依托单位: Blendics, Inc.
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2009
• 资助国家: 美国
• 起止时间: 2009-09-01 至 2014-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0924010&HistoricalAwards=false
• 关键词: STTR; Phase; II; Blended; Clocked

This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).This Small Business Technology Transfer (STTR) Phase II research project will develop and apply a principled design methodology to confront the serious problems associated with deep sub-micron, system-on-chip, integrated-circuit designs. The project will develop design services for companies wishing to market complex, proprietary, low-power integrated circuits through the development of a unique design tool, one which will apply a mathematically sound approach to the production of large, hazard-free, network-on-chip products. The goal for this tool is to reduce traditional design cycles by eliminating most of the global verification effort while improving the robustness of the design. New results in predicting the behavior of deep submicron arbiter circuits are essential to this work and will also be reported.The broader impacts of this research are to reduce design costs, time-to-market and power consumption. More broadly this can: 1) significantly increase the productivity of integrated-circuit design engineers, 2) reduce power consumption of electronic control, communication and computational systems and 3) increase our competitiveness against off-shore system-on-chip designers particularly with respect to low volume products. Thus, successful completion of this project is important to the future of the national electronics marketplace because, without a major reduction in the time spent on global verification, the benefits of higher levels of integration, including reductions in time-to-market, conservation of power and increases in reliability, will not be available to many important electronics market sectors.

该奖项是根据2009年美国复苏和再投资法案（公法111-5）资助的。该小企业技术转让（STTR）第二阶段研究项目将开发和应用一种原则性的设计方法，以应对与深亚微米，片上系统，集成电路设计相关的严重问题。该项目将通过开发一种独特的设计工具，为希望销售复杂、专有、低功耗集成电路的公司提供设计服务，这种工具将采用数学上合理的方法来生产大型、无危险、芯片上网络产品。该工具的目标是通过消除大部分全局验证工作来缩短传统设计周期，同时提高设计的鲁棒性。在预测深亚微米仲裁电路的行为的新结果是必不可少的这项工作，也将被reported.The更广泛的影响，这项研究是减少设计成本，上市时间和功耗。更广泛地说，这可以：1）显著提高集成电路设计工程师的生产力; 2）降低电子控制、通信和计算系统的功耗; 3）提高我们与离岸片上系统设计师的竞争力，特别是在小批量产品方面。因此，该项目的成功完成对国家电子市场的未来至关重要，因为如果不大幅减少全球核查所用的时间，那么许多重要的电子市场部门将无法获得更高水平的一体化带来的好处，包括缩短上市时间、节约能源和提高可靠性。