SBIR Phase I: TriStar, An Algebraic High Performance Communications Signal Processor

SBIR 第一阶段：TriStar，代数高性能通信信号处理器

• 批准号: 0945722
• 负责人: Michael Lewis
• 金额: $ 14.98万
• 依托单位: THE ATHENA GROUP INC
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2010
• 资助国家: 美国
• 起止时间: 2010-01-01 至 2010-12-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0945722&HistoricalAwards=false
• 关键词: SBIR; Phase; TriStar; Algebraic; Performance

This Small Business Innovation Research (SBIR) Phase I project will research and develop an innovative and revolutionary core wireless infrastructure technology. Wireless technologies impact virtually every aspect of life and require a new high performance, low latency, low power infrastructure technology to move to the next level. Today, communications and digital signal processors (DSPs) achieve high performance levels by creating multi-processor designs; as a consequence, these systems can be overly complex, costly, and power consuming. The proposed project utilizes a high-performance communications and DSP processor design; one based on an understanding of computer arithmetic rather than a massive infusion of hardware. The Phase I project will (1) develop a mathematical framework in which physicallyrealizable multiplier-less TriStar filters and transforms having user defined critical frequency or frequencies can be derived, (2) develop a design methodology that can optimize TriStar solutions for speed, power, complexity and/or latency; and (3) quantify and validate the performance and packaging gains using powerful EDA tools. The hardware implementation of the resulting multiplier-free system will achieve superior performance, cost, and power consumption when compared to today?s best wireless solutions.The broader impact/commercial potential of this project is found in the rapidly increasing $200B (US) wireless market, a market with rapidly increasing technological demands and requirements. The proposedtechnology represents a major advance in the foundation or infrastructure technology that underlies a wide range of communications, sensor, instrumentation, and telemetry applications. It brings multipleefficiencies to these applications, delivering improved performance, reduced power, reduced silicon area and silicon expense, and run-time reconfigurability. The proposed technology delivers these basic economicjustifications while simultaneously delivering such game-changing benefits as extended product life cycle, and improved product performance which can be expressed in attributes consumers prize: longer battery life and faster wireless data rates. Commercial product release will be in a form preferredby the targeted customer-base, namely as semiconductor intellectual property (IP) cores ready for use in semiconductor chip manufacturing. As a result, customers can rapidly and affordably develop and evaluate new wireless solutions and scientific instruments that provide their customers and the public with more affordable, capable, and reliable wireless systems, devices, and accessories.

这个小企业创新研究（SBIR）第一阶段项目将研究和开发一种创新和革命性的核心无线基础设施技术。无线技术几乎影响着生活的方方面面，需要一种新的高性能、低延迟、低功耗的基础设施技术才能进入下一个阶段。今天，通信和数字信号处理器（dsp）通过创建多处理器设计实现高性能水平；因此，这些系统可能过于复杂、昂贵且耗电。本课题采用高性能通信和DSP处理器设计；它基于对计算机运算的理解，而不是大量的硬件。第一阶段项目将(1)开发一个数学框架，其中可以推导出具有用户定义的临界频率或频率的物理可实现的无乘法器三星滤波器和变换，(2)开发一种设计方法，可以优化三星解决方案的速度，功率，复杂性和/或延迟；(3)使用强大的EDA工具量化和验证性能和封装增益。与目前相比，由此产生的无乘法器系统的硬件实现将实现卓越的性能、成本和功耗。最好的无线解决方案。该项目更广泛的影响/商业潜力是在快速增长的2000亿美元（US）无线市场中发现的，这个市场的技术需求和要求迅速增加。拟议的技术代表了基础或基础设施技术的重大进步，这些技术是广泛的通信，传感器，仪器仪表和遥测应用的基础。它为这些应用程序带来了多重效率，提供了更高的性能、更低的功耗、更小的硅面积和硅成本，以及运行时的可重构性。拟议的技术提供了这些基本的经济理由，同时提供了诸如延长产品生命周期，提高产品性能等改变游戏规则的好处，这些好处可以用消费者青睐的属性来表达：更长的电池寿命和更快的无线数据速率。商业产品将以目标客户群首选的形式发布，即作为半导体知识产权（IP）核心准备用于半导体芯片制造。因此，客户可以快速和经济地开发和评估新的无线解决方案和科学仪器，为他们的客户和公众提供更实惠、功能更强、更可靠的无线系统、设备和配件。