EAGER: Network-Driven Shared Resource Design and Management in Multicores

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As more compute, memory, and storage resources continue to be integrated within multicore chips and multiprocessor systems built from multicores, significant advancements in the interconnect architecture that enable efficient connectivity and sharing among multiple heterogeneous system resources (including caches) across multiple hierarchy levels are needed. Escalating energy and reliability problems with nanometer technology scaling are making over-provisioning and static allocation of resources less viable for meeting increasing performance demands. This exploratory research investigates new and innovative on-chip network designs and network-driven shared resource management techniques that have the broader impact of laying important groundwork for realizing adaptive, fault-resilient, low-cost, energy- and performance-efficient multicore parallel computing systems with hundreds to thousnads of nodes.