SHF: Small: Collaborative Research: Design of Many-core NoCs for the Dark Silicon Era

SHF：小型：协作研究：暗硅时代的多核 NoC 设计

• 批准号: 1619472
• 负责人: Timothy Pinkston
• 金额: $ 10万
• 依托单位: University of Southern California
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2016
• 资助国家: 美国
• 起止时间: 2016-07-01 至 2020-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1619472&HistoricalAwards=false
• 关键词: SHF; Small; Collaborative; Research; Design

The proliferation of computing systems of various forms and scales have significantly advanced science, technology, discovery and society at large for the benefit of human kind. As the key building blocks of current and future computing systems?including the Internet of Things, many-core chip multiprocessors (CMPs) are facing unprecedented power challenges brought on by limits in Dennard scaling. This necessitates many-core chips to be designed with the ability to power down on-chip resources to effectively provide scalable performance while keeping power and energy consumption proportional to computing load. This necessity leads to considerable portions of many-core chips having to go dark, thus ushering in the era of dark silicon. To facilitate dark silicon computing, not only computational resources (i.e., processor cores) but also communication resources (i.e., networks on chips, or NoCs) used to connect the computational resources must be developed that can be powered up or down proportionally with performance scalability in response to prevailing load.This research investigates new opportunities, significant challenges, and innovative solutions for harnessing dark silicon in NoC architectures that meet performance, power and energy requirements in the dark silicon era. The objective is to enable non-essential NoC routers to be powered down when needed as well as to enable a corresponding maximum number of routers and router components to be powered down for a given reduction in the number of powered-up processor cores in order to provide energy-proportional, low-power, on-chip communication. Among some of the specific lines of research that are explored are alternative topologies and coordinated routing algorithms to enable more efficient power-gating of NoC routers, holistic approaches for exploiting coordination between the NoC and other on-chip system components as well as factoring in key application characteristics, and novel packet-oriented dynamic power control schemes that explore energy-saving opportunities beyond the conventionally targeted low-load traffic region. Beyond its technical contributions that can impact fundamental advancement in dark silicon computing, this research also has impact more broadly on research education and outreach. Findings from this research are incorporated into graduate curriculum, courses, and undergraduate research experiences. Outreach activities to broaden participation in computing of persons from diverse backgrounds and development levels are also featured.

各种形式和量表的计算系统的扩散具有显着的先进科学，技术，发现和社会，从而使人类受益。作为当前和未来计算系统的关键构建块？包括物联网，多核芯片多处理器（CMP）面临着丹纳德缩放中限制带来的前所未有的功率挑战。这需要设计多核芯片，具有降低芯片资源的能力，以有效地提供可扩展性能，同时保持与计算负载成比例的功耗和能源消耗。这种必要性导致大部分多核芯片必须变黑，从而在黑暗硅时代迎来了。 To facilitate dark silicon computing, not only computational resources (i.e., processor cores) but also communication resources (i.e., networks on chips, or NoCs) used to connect the computational resources must be developed that can be powered up or down proportionally with performance scalability in response to prevailing load.This research investigates new opportunities, significant challenges, and innovative solutions for harnessing dark silicon in NoC architectures that meet performance, power and energy黑暗硅时代的要求。目的是使非必需的NOC路由器在需要时向下电动，并使相应的最大路由器和路由器组件能够向下供电，以减少功率上流的处理器芯的数量，以便提供能量可提供的，低功率，低功率，换行交流。在探索的一些具体研究线中，有替代性拓扑和协调的路由算法，以实现NOC路由器的更有效的电源，这些方法是利用NOC和其他芯片上系统组件和其他方面的关键应用程序特征的芯片系统组件之间的协调方法，以及具有针对性的动态能源量的机能，这些方法不仅构成了定向动态的能量范围。除了其技术贡献会影响黑暗硅计算中基本进步的技术贡献外，这项研究还对研究教育和外展的影响更大。这项研究的发现纳入了研究生课程，课程和本科研究经验。外展活动还可以扩大参与来自不同背景和发展水平的人的计算。