The Origins of the Dead-Layer in High Energy Storage Density Nanocapacitors

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Consider the following: the expected capacitance of a 2.7 nm SrTiO3 thin film is 1600 fF per square micrometer. What is the likely value in reality? 258 fF per square micrometer! This dramatic drop in capacitance is attributed to the so-called "dead layer" effect. In this collaborative experimental and computational research we seek to understand the scientific underpinnings of the "dead-layer" and break that bottleneck to realize ultra-high capacity nano-capacitors. Prototype nano-capacitors with specifically designed interfaces (through atomistic methods) will be experimentally fabricated. Some of the basic scientific issues underpinning the role of interfaces will be addressed by fabricating super-conducting electrodes.The expected benefits of the program will be both educational and societal. Next generation advances in energy storage and nanoelectronics require capacitors fabricated at the nanoscale. High dielectric constant materials such as ferroelectrics are important candidates for those. Recent work has shown that, despite popular belief to the contrary, electrostatic nanocapacitor arrays can be used for high energy storage density as well and not just high power density (i.e. paving the way for large scale application such as automotive). The educational impact is that both undergraduate and graduate students will be trained in emerging and interdisciplinary research that falls at the intersections of materials science, mechanics, and physics. This grant puts specific emphasis on research experience for high school students and undergraduate students and in particular female scholars. Research findings will be incorporated into courses, modules specifically targeted towards grade school students, and broadly disseminated through conference presentations, scholarly publications, and the PI's websites.