CSR: Small: Enabling High-Concurrency and Scalability for Many-Core Processors

支持多核处理器的高并发性和可扩展性我们正在为多核处理器开发一种新的操作系统（OS）。由于功率和其他原因，现在的微处理器设计涉及越来越多的内核，预计将来每个芯片的内核数将达到100或1000个。即使对于主流应用程序，向高并发性的转变也意味着需要简化并发编程，并且需要能够管理和交付高并发性的操作系统。第一步是利用“私有”内存，操作系统和编译器可以在不需要并发控制的情况下使用它，从而实现简单性和高性能。在操作系统和编译器的支持下，这种最简单的并发管理形式可以更频繁地使用，并且我们可以检测隐私假设是否有效，从而防止一类错误。对于“令人尴尬的”并行应用程序，这个模型通常就足够了。对于更复杂的并发模式，我们将编译器分析与动态锁定结合起来，这使我们能够根据争用的数量自适应地从各种同步方法中进行选择，并通过静态和动态分析的组合检查常见的同步错误。最后，内置推测执行可以为长时间运行的任务（如异步I/O操作）隐藏延迟。有了多个核心，我们现在可以推测地并行执行多个路径。此外，这些机制可以用作容错的轻量级检查点/重新启动，特别是对于瞬态或不确定的错误，从而简化高可用性应用程序。

Enabling High-Concurrency and Scalability for Many-Core ProcessorsWe are developing a novel operating system (OS) for many-core processors. For power and other reasons, microprocessor designs now involve increasing numbers of cores, with an expectation of 100s or 1000s of cores per chip in the future. The movement to high concurrency even for mainstream applications implies the need to simplify concurrent programming and the need for an OS capable of managing and delivering high concurrency.The first step is to leverage "private" memory, which the OS and the compiler can use without the need for concurrency control, thus achieving both simplicity and high performance. With OS and compiler support, this simplest form of concurrency management can be used more often and we can detect when the privacy assumption is not valid, thus preventing one class of errors. For "embarrassingly" parallel applications, this model often suffices.For more complex concurrency patterns, we combine compiler analysis with dynamic locking, which allows us to choose adaptively from a variety of synchronization methods based on the amount of contention, and also check for common synchronization errors through a combination of static and dynamic analysis.Finally, built-in speculative execution enables latency hiding for long-running tasks, such as asynchronous I/O operations. With a many cores we can now speculatively execute several paths in parallel. Additionally, these mechanisms can be used as a lightweight checkpoint/restart for fault tolerance, especially for transient or non-deterministic bugs, thus simplifying high-availability applications.