SHF: Small: Auxiliary Hardware/Software Mechanisms for Flexible Memory Access Control

当今应用程序的可靠性、安全性和安全性依赖于执行期间受控的数据访问和更新。例如，许多新兴的应用程序是由多个软件模块组成的。为了在单个地址空间内保护这些模块，需要仔细地监视和控制模块间的操作。此外，实时检查内存访问错误（如缓冲区溢出、内存泄漏和对未初始化数据的访问）可以提高在线系统的可靠性。类似地，内存访问监视可以支持复杂系统中的信息流跟踪，以增强安全性。当前处理器中的可用机制与对虚拟内存的支持绑定在一起，使得访问控制的实现既重又粗。该研究将设计和利用新的轻量级存储器访问控制机制，该机制独立于现有的系统存储器保护并服从于现有的系统存储器保护。在硬件级别，这种方法将访问控制机制置于公共关键路径之外，从而将对处理器核心的影响降至最低。在操作系统级别，所需的支持主要在内核内存管理功能之外，只有在执行时才会产生开销。这种辅助机制更适合实际部署，但它们能够支持细粒度和灵活的内存保护。结合这些硬件/软件机制，该研究将设计一种新的保护模型，可以根据应用程序的需求在用户或特权级别进行操作。开发的灵活、高效的内存监控框架将启用调试工具，这些工具可以帮助检测内存访问错误（如越界访问），并帮助在活动系统中执行数据安全性或隐私策略。建议的工作将针对各种各样的应用程序和利用，以验证提高程序员生产力的目标。

The reliability, safety, and security of today's applications depend on controlled data accesses and updates during execution. For instance, many emerging applications are composed of multiple software modules. To protect these modules from each other within a single address space, inter-module operations need to be carefully monitored and controlled. Additionally, the reliability of online systems can benefit from live checking of memory access errors such as buffer overflows, memory leaks, and accesses to uninitialized data. Similarly, memory access monitoring can support information flow mtracking in a complex system for enhanced security.Available mechanisms in today's processors are tied to support for virtual memory, making implementation of access control both heavy weight and coarse grained. The proposed research will design and utilize new light-weight memory access control mechanisms that are independent of and subordinate to existing system memory protection. At the hardware level, this approach minimizes impact on the processor core by placing the access control mechanisms outside the common critical path. At the operating system level, the required support is largely outside of the kernel memory management functions, incurring overhead only when exercised. Such auxiliary mechanisms are more amenable to practical deployment, yet they are capable of supporting fine-grained and flexible memory protection. In conjunction with these hardware/software mechanisms, the research will devise a new protection model that can be manipulated either at user or privileged level based on an application's requirements. The flexible, efficient memory monitoring framework developed will enable debugging tools that can help detect memory access errors such as out-of-bound accesses, and help enforce data security or privacy policies in live systems. The proposed work will target a wide variety of applications and utilizations with a view to validating the goal of improved programmer productivity.