SBIR Phase I: A Novel Memory Having Both Volatile and Non-Volatile Modes For High Performance, Low Power Applications

这个小型企业创新研究（SBIR）第一阶段项目旨在开发一种新的存储器，它具有易失性和非易失性功能。这样的存储器结合非易失性存储器？在没有电源的情况下保持信息的能力（如闪存）和易失性存储器的快速访问速度和可靠性（如静态随机存取存储器（SRAM））。该存储器使用主流或接近生产的制造工艺制造，并且是单晶体管器件，其导致紧凑的单元尺寸，适合于具有成本效益的高密度应用。 所提出的存储器单元集成浮体晶体管和相变存储器元件。 在正常操作期间，存储器器件用作浮体存储器器件，并且在存取速度、功率和耐久能力方面具有类似SRAM的性能。 当从存储器装置移除电力时，浮动主体的状态借助于质量并行自反馈机制而保存到相变存储器元件中。 在电力恢复之后，浮体的原始状态也通过质量、平行、自反馈机制恢复。该项目的更广泛的影响/商业潜力是使节能计算应用和移动的设备成为可能。 例如，它可以用于降低数据中心的功耗。 数据中心？每年的能源消耗估计为1500亿千瓦时，大约是目前美国太阳能电池板容量的两倍。 一个高能效的内存，如本提案中提出的，可以减少整体数据中心？功耗降低高达75%。 另一个应用是提供集成存储器解决方案。 许多电子设备由于其自身的不同特性而当前采用多种类型的存储器。 所提出的装置将能够将不同类型的存储器联合收割机组合成单个存储器装置。

This Small Business Innovation Research (SBIR) Phase I project seeks to develop a novel memory, which has both volatile and non-volatile functionality. Such memory combines the non-volatile memory?s ability to retain information in the absence of power (such as Flash memory) and the fast access speed and reliability of a volatile memory (such as Static Random Access Memory (SRAM)). This memory is fabricated using a mainstream or near-production fabrication process and is a one-transistor device, which results in a compact cell size, suitable for cost-efficient high density applications. The proposed memory cell integrates a floating body transistor and a phase change memory element. During normal operation, the memory device functions as a floating body memory device and has SRAM-like performance, as in the access speed, power, and endurance capability. When power is removed from the memory device, the state of the floating body is saved into the phase change memory element by means of a mass, parallel, self-feedback mechanism. Subsequent to power restore, the original state of the floating body is recovered, also by means of a mass, parallel, self-feedback mechanism.The broader impact/commercial potential of this project is to enable power-efficient computing applications and mobile devices. For example, it can be used to reduce power consumptions in data centers. Data centers? annual energy consumption is estimated to be 150 billion kWh, about twice the capacity of the current US solar panel. A power-efficient memory such as the one proposed in this proposal can reduce the overall data centers? power consumption by up to 75%. Another application is to provide an integrated memory solution. Many electronic devices currently employ multiple types of memory, due to their own distinct characteristics. The proposed device will be able to combine the different types of memory into a single memory device.