SBIR Phase I: VCSELs On Silicon: CMOS Compatible Epitaxial Mesas On Large Silicon Wafers

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This Small Business Innovation Research (SBIR) Phase I project proposes todevelop a revolutionary, yet simple and well-designed technique for the cost effectivedeposition of compound semiconductor epitaxial material mesa arrays on large (300mm)silicon wafers. The subsequent processing steps integrate smoothly with silicon CMOS(Complementary Metal-Oxide-Semiconductor) processing similar to the current SiGe(Silicon Germanium) BiCMOS (Bipolar CMOS) technology. Previous attempts at theintegration of III-V materials with silicon have had limited success due to many factorsincluding high cost, CMOS incompatibility, small wafer size, and a lack of technologicaland market readiness. In contrast, the proposed solution is very cost effective, and itbuilds on recent technological progress in advanced materials deposition and handling.The vehicle chosen for the demonstration of this technology is the fabrication of highspeed VCSEL (Vertical Cavity Surface Emitting Laser) arrays on silicon. The immediateapplication is in high speed interconnects for computer systems and peripherals includingnext generation USB (Universal Serial Bus) cables.The broader impact/commercial potential of this project lies in the followingaspects: This technology can merge the advanced compound semiconductor materialswith the superior processing and efficiency of silicon ICs. This will end years of isolateddevelopment and will bring new electronic and optoelectronic device capabilities tomainstream silicon processing. In electronics applications, high speed and high powertransistors based on InP, and GaN device technologies will be processed with siliconCMOS on large wafers. This will integrate advanced analog and power functions withsilicon CMOS based control and processing. In addition, it will offer an alternative routefor the continuation of performance enhancement in silicon ICs independent of featuresize reduction. In optoelectronics, the integration of GaAs and InP based optical emittersand receivers on silicon will allow the miniaturization and cost reduction of opticaltransmitter and receiver modules. The seamless integration of optical and electronicfunctions on silicon chips will lead to faster interconnects and will significantly reducethe cost per bit in fiber optic signal transmission.