SBIR Phase I: VCSELs On Silicon: CMOS Compatible Epitaxial Mesas On Large Silicon Wafers

SBIR 第一阶段：硅上 VCSEL：大型硅片上的 CMOS 兼容外延台面

• 批准号: 1047454
• 负责人: John Wasserbauer
• 金额: --
• 依托单位: OEPIC SEMICONDUCTORS, INC
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2011
• 资助国家: 美国
• 起止时间: 2011-01-01 至 2011-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1047454&HistoricalAwards=false
• 关键词: SBIR; Phase; VCSELs; Silicon; CMOS

This Small Business Innovation Research (SBIR) Phase I project proposes todevelop a revolutionary, yet simple and well-designed technique for the cost effectivedeposition of compound semiconductor epitaxial material mesa arrays on large (300mm)silicon wafers. The subsequent processing steps integrate smoothly with silicon CMOS(Complementary Metal-Oxide-Semiconductor) processing similar to the current SiGe(Silicon Germanium) BiCMOS (Bipolar CMOS) technology. Previous attempts at theintegration of III-V materials with silicon have had limited success due to many factorsincluding high cost, CMOS incompatibility, small wafer size, and a lack of technologicaland market readiness. In contrast, the proposed solution is very cost effective, and itbuilds on recent technological progress in advanced materials deposition and handling.The vehicle chosen for the demonstration of this technology is the fabrication of highspeed VCSEL (Vertical Cavity Surface Emitting Laser) arrays on silicon. The immediateapplication is in high speed interconnects for computer systems and peripherals includingnext generation USB (Universal Serial Bus) cables.The broader impact/commercial potential of this project lies in the followingaspects: This technology can merge the advanced compound semiconductor materialswith the superior processing and efficiency of silicon ICs. This will end years of isolateddevelopment and will bring new electronic and optoelectronic device capabilities tomainstream silicon processing. In electronics applications, high speed and high powertransistors based on InP, and GaN device technologies will be processed with siliconCMOS on large wafers. This will integrate advanced analog and power functions withsilicon CMOS based control and processing. In addition, it will offer an alternative routefor the continuation of performance enhancement in silicon ICs independent of featuresize reduction. In optoelectronics, the integration of GaAs and InP based optical emittersand receivers on silicon will allow the miniaturization and cost reduction of opticaltransmitter and receiver modules. The seamless integration of optical and electronicfunctions on silicon chips will lead to faster interconnects and will significantly reducethe cost per bit in fiber optic signal transmission.

这个小企业创新研究（SBIR）第一阶段项目旨在开发一种革命性的、简单的、精心设计的技术，用于在大型（300mm）硅片上低成本地沉积化合物半导体外延材料台面阵列。随后的加工步骤与硅CMOS（互补金属氧化物半导体）加工顺利集成，类似于当前的SiGe（硅锗）BiCMOS（双极CMOS）技术。由于许多因素，包括高成本，CMOS不兼容性，小晶圆尺寸以及缺乏技术和市场准备，先前尝试将III-V材料与硅集成的成功有限。相比之下，提出的解决方案非常具有成本效益，并且它建立在先进材料沉积和处理方面的最新技术进步之上。用于演示该技术的载体是在硅上制造高速VCSEL（垂直腔面发射激光器）阵列。直接应用于计算机系统和外围设备的高速互连，包括下一代USB（通用串行总线）电缆。该项目的更广泛的影响/商业潜力在于以下几个方面：该技术可以将先进的化合物半导体材料与硅集成电路的优越加工和效率相结合。这将结束多年的孤立发展，并将为主流硅加工带来新的电子和光电子器件能力。在电子应用中，基于InP和GaN器件技术的高速和高功率晶体管将在大晶圆上用硅cmos加工。这将集成先进的模拟和功率功能与基于硅CMOS的控制和处理。此外，它将为硅集成电路的持续性能增强提供另一种途径，而不依赖于特征尺寸的减小。在光电子学中，基于GaAs和InP的光发射器和接收器在硅上的集成将允许光发射器和接收器模块的小型化和成本降低。硅芯片上光学和电子功能的无缝集成将导致更快的互连，并将显着降低光纤信号传输的每比特成本。