CAREER: Removing Energy Barrier Towards Capacity-Approaching Information Transmission and Storage

项目摘要消除能量障碍，实现接近容量的信息传输和存储本研究的目标是减少接近香农容量的信息传输和存储的总能量。虽然使用信道编码来节省传输能量以实现可靠传输是很常见的，但由于电路的复杂性，一些最佳容量逼近码的解码能量可能会令人望而却步，并且会超过传输能量。许多接近容量的码也不能保证很好地工作，因为它们经常在低误码率时放弃其有效性，需要额外的传输能量来维持其性能。由于接近最终信道容量的运营成本不断上升，用于传输和解码的能量不断上升，对未来的高性能应用(如光纤和有线通信)构成了障碍。电池供电的便携设备和传感器等低能耗应用在获得更强的通信和存储能力的过程中遇到了更严重的障碍。本研究通过解决近容量低密度奇偶校验(LDPC)码的两个研究前沿：(1)表现为错误平层的LDPC码的内在弱点；(2)由于互连复杂和存储器效率低下而导致的高译码能量，提出了最新的编码算法和技术。这些方法跨越了编码理论和集成电路，其新颖性有三个方面：(1)创建一种通用的、低成本的局部搜索算法来克服错误平层；(2)创建瞬时存储器来利用低能耗的数据访问模式；(3)在降低互连复杂性的同时提高非二进制LDPC码的可实现性能的新技术。该项目对学生进行编码理论和集成电路方面的培训，并吸引了学生、专业同事和工业合作伙伴在合作研究和教育方面的广泛参与。

Project AbstractRemoving Energy Barrier towards Capacity-Approaching Information Transmission and StorageThe objective of this research is to cut the total energy of achieving near Shannon capacity information transmission and storage. While it is common to use channel coding to save transmit energy for a reliable delivery, the decode energy of some of the best capacity-approaching codes can be prohibitive due to circuit complexities and overtake transmit energy. Many capacity-approaching codes are not guaranteed to work well either, as they often give up their effectiveness at low error rates, requiring extra transmit energy to maintain their performance. The rising energy for both transmit and decode poses obstacles to future high-performance applications, such as optical and wireline communications, due to the escalating cost of operating closer to the ultimate channel capacity. More severe impediments are placed on low-energy applications, such as battery-powered portable devices and sensors, in their path of acquiring more robust communication and storage capabilities.This research advances state-of-the-art coding algorithms and techniques by addressing two research frontiers of near-capacity low-density parity-check (LDPC) codes: (1) the intrinsic weakness of LDPC codes that is manifested as error floors; and (2) the high decode energy due to interconnection complexity and memory inefficiency. The approaches span coding theory and integrated circuits, and their novelties are threefold: (1) creation of a universal, low-cost local search algorithm to overcome error floors; (2) creation of transient memory to exploit data access pattern for low energy; and (3) new techniques to improve the achievable performance of non-binary LDPC codes while reducing interconnection complexity. This project trains students in both coding theory and integrated circuits and draws broad participation of students, professional colleagues, and industrial partners in collaborative research and education.