CRI: CI-P: Planning for an Innovative Dual-Path Computer Architecture Modeling Infrastructure for Highly Productive System Simulation and Emulation

详细的架构模拟器对于计算机架构师来说是必不可少的。不幸的是，当今最快的模拟器无法提供理想的模拟吞吐量。当研究目标是具有数百个处理器核心的下一代系统时，问题变得更加严重。缺乏快速且多功能的多核系统模拟器将严重影响研究人员的生产力以及他们及时进行技术创新的能力。此外，现有的教学基础设施主要是过时的单核系统。该项目旨在计划提交 CI 提案，以创建和部署非常快速且通用的模拟和仿真基础设施，该基础设施可以使用实际工作负载对大型多核处理器系统进行建模和评估。拟议的基础设施重点关注多核范式中架构研究的核心组件 - 内存层次结构和互连的设计。 PI 计划将开发的基于跟踪的高速软件和基于 FPGA 的仿真和仿真技术集成起来，这些技术可比传统仿真技术提供数量级的加速。所提出的新颖的双路径方法基于通用图形界面，允许用户轻松快速地指定架构配置并使用这些跟踪驱动的仿真技术对其进行测试。

A detailed architecture simulator is indispensable for computer architects. Unfortunately, today's fastest simulators do not provide desirable simulation throughput. The problem becomes even more serious when the target of a study is next-generation systems having hundreds of processor cores. The lack of a fast and versatile multicore system simulator will seriously hamper the productivity of researchers, as well as their capability to produce timely technical innovations. Moreover, existing teaching infrastructures are predominantly for outdated single-core systems. This project is for planning the submission of a CI proposal to create and deploy a very fast and versatile simulation and emulation infrastructure that can model and evaluate a large multicore processor system using realistic workloads.The proposed infrastructure focuses on the core components of architectural research in the multicore paradigm - the design of the memory hierarchy and interconnect. The PIs plan to integate developed high-speed trace-based software and FPGA-based simulation and emulation techniques that provide orders of magnitude speedup over conventional simulation techniques. The proposed novel dual-path approach is based on a common graphical interface that allows a user to easily and quickly specify an architecture configuration and test it using these trace-driven simulation techniques.