课题基金 / 基金详情

SHF: Small: A Register Transfer Level Toolset for Low Power Asynchronous Design Using Null Convention Logic

SHF: Small: A Register Transfer Level Toolset for Low Power Asynchronous Design Using Null Convention Logic
SHF:小型:使用空约定逻辑的低功耗异步设计的寄存器传输级工具集
批准号:
1116405
负责人:
Mitchell Thornton
金额:
$35.0万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2011
资助国家:
美国
项目状态:
已结题
起止时间:
2011-07-01 至 2014-06-30

项目摘要

项目成果

Mitchell Thornton的其他基金

相似基金

相关文献

中文摘要
翻译
点击翻译按钮获取中文摘要
英文摘要
Modern information processing circuits found in devices such as cell phones and laptop computers run a fixed speed, known as a clock speed. As clock speeds increase, more data can be processed in a shorter time allowing for intensive applications such as streaming video and audio to be used. As clock speeds increase, the amount of power required to run the circuits also increases. A new approach would require no clock signal at all. In this approach, called asynchronous processing, data would be processed as soon as it is available. Asynchronous circuits can provide very fast data processing capabilities while also reducing the amount of power consumed. Another advantage is that recently methods have been devised that monitor signals radiated from clocked circuits that can allow thieves to obtain copies of the data being processed. Asynchronous circuits make this form of data theft much harder and are therefore more secure circuits. Unfortunately, the methods used to design asynchronous circuits are very immature and several important research problems must be solved to enable this technology to become widely used. This project has proposed solutions to these problems and the research will allow asynchronous design methods to be more fully developed and will ultimately enable asynchronous circuits to be commonly used. The impact of having asynchronous data processing circuits in devices such as notebook computers and cell phones is that these devices will consume less power allowing them to operate much longer before recharging their batteries. For some applications, the performance of asynchronous circuits will increase since processing will occur on the data as soon as it is available. In contrast, a clocked circuit must wait until the next clock cycle before further data processing can occur. Finally, asynchronous circuits offer more security against certain data stealing attacks known as "side channel" attacks. This will prevent data thieves from accessing your data by listening to the signals emanating from
期刊论文(0)
专著(0)
科研奖励(0)
会议论文
Statistical Equivalence Checking Using Partial Haar Spectral Diagrams
  • 批准号:
    0243358
  • 项目类别:
    Standard Grant
  • 资助金额:
    $1.71万
  • 财政年份:
    2002
  • 负责人:
    Mitchell Thornton
  • 依托单位:
Evolutionary Algorithms for Symbolic FSM Equivalence Checking
  • 批准号:
    0243365
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $14.77万
  • 财政年份:
    2002
  • 负责人:
    Mitchell Thornton
  • 依托单位:
Evolutionary Algorithms for Symbolic FSM Equivalence Checking
  • 批准号:
    0097246
  • 项目类别:
    Continuing Grant
  • 资助金额:
    $16.14万
  • 财政年份:
    2001
  • 负责人:
    Mitchell Thornton
  • 依托单位:
Statistical Equivalence Checking Using Partial Haar Spectral Diagrams
  • 批准号:
    0000891
  • 项目类别:
    Standard Grant
  • 资助金额:
    $13.61万
  • 财政年份:
    2000
  • 负责人:
    Mitchell Thornton
  • 依托单位:
国内基金
海外基金
昼夜节律性small RNA在血斑形成时间推断中的法医学应用研究
  • 批准号:
  • 项目类别:
    省市级项目
  • 资助金额:
    --
  • 批准年份:
    2024
  • 负责人:
  • 依托单位:
tRNA-derived small RNA上调YBX1/CCL5通路参与硼替佐米诱导慢性疼痛的机制研究
  • 批准号:
  • 项目类别:
    省市级项目
  • 资助金额:
    10.0万元
  • 批准年份:
    2022
  • 负责人:
    张祥忠
  • 依托单位:
Small RNA调控I-F型CRISPR-Cas适应性免疫性的应答及分子机制
Small RNAs调控解淀粉芽胞杆菌FZB42生防功能的机制研究
  • 批准号:
    31972324
  • 项目类别:
    面上项目
  • 资助金额:
    58.0万元
  • 批准年份:
    2019
  • 负责人:
    高学文
  • 依托单位: