CAREER: System-level Run-time Management Techniques for Energy-efficient Silicon-Photonic Manycore Systems
CAREER: System-level Run-time Management Techniques for Energy-efficient Silicon-Photonic Manycore Systems
批准号:
1149549
负责人:
Ajay Joshi
金额:
$46.93万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2012
资助国家:
美国
项目状态:
已结题
起止时间:
2012-04-01 至 2018-03-31
中文摘要
在过去的几十年里,世界通用计算能力以每年50%以上的速度增长,预计未来这一趋势将继续下去。然而,这种计算能力的增加直接转化为功率消耗的增加。事实上,2006年美国服务器群和数据中心的用电量占全国总用电量的1.5%,而且这一数字每年都在稳步增长,因此为计算系统开发节能解决方案至关重要。计算机科学家和工程师转向在单个芯片上设计数十个低功率核心的系统,以解决功率问题,同时通过并行提高计算能力。然而,由于当前和预计的电气技术缺乏高能效的高带宽密度(片上和片外)链路解决方案,这些多核心系统的部署受到了阻碍。硅-光子链路技术可以潜在地解决这个问题,因为它提供的带宽密度比同等的电子链路高一个数量级。然而,这些硅-光子链路的功耗远远抵消了任何带宽优势,进而限制了它们在设计多核系统中的广泛采用。本项目探索系统级技术(包括无源和主动),以最大限度地降低硅光网络(芯片间和芯片内)的功耗和最大化带宽,进而提高多核系统的能效。特别是,该项目侧重于硅-光子链路中两个最大的功耗来源--激光光源和调制器/滤光器环的有源调谐(在热变化下保持共振所必需的)。正在研究四种技术-光子资源的运行时分配、工作负载调度/迁移、内存映射和动态电压和频率调节(DVFS),它们使用运行时系统动力学来重新配置系统以提高其能量效率。该项目采用了一种垂直集成的方法,在了解底层硅-光子链路电路和硅-光子器件的同时,探索这些系统级技术。在更广泛的层面上,该项目为快速采用硅-光子链路技术以实现节能多核系统的设计铺平了道路。这可以提供节能的计算解决方案,进而降低运营成本和国家的碳足迹--S计算服务器场和数据中心。在教育方面,该项目利用波士顿大学开展的众多外联计划,让具有不同背景和教育水平的学生参与与该项目相关的不同研究活动。
英文摘要
The general purpose computing capacity of the world has been increasing at an annual rate of more than 50% over the past few decades, and this trend is expected to continue in the future. However, this increasing compute capacity directly translates to increasing power dissipation. In fact, the server farms and data centers in US consumed 1.5% of the nation's total electricity in 2006, and this number has been steadily growing every year making it absolutely critical to develop energy-efficient solutions for computing systems. Computer scientists and engineers migrated towards designing systems with dozens of low power cores on a single die to address the power problem while improving the compute capacity through parallelism. However, the deployment of these manycore systems has been impeded by the lack of energy-efficient high-bandwidth density (on-chip and off-chip) link solutions in current and projected electrical technology. Silicon-photonic link technology can potentially solve this problem as it provides an order of magnitude higher bandwidth density than equivalent electrical links. However, the power consumed in these silicon-photonic links more than offsets any bandwidth advantages, in turn limiting their widespread adoption for designing manycore systems.This project explores system-level techniques (both reactive and proactive) to minimize power dissipation and maximize bandwidth of the silicon-photonic networks (inter-chip and intra-chip), and in turn improve the energy efficiency of manycore systems. In particular, the project focuses on the two largest sources of power consumption in silicon-photonic links - the laser sources and the active tuning of modulator/filter rings (required to maintain resonance under thermal variations). Four techniques - run-time assignment of photonic resources, workload scheduling/migration, memory mapping, and dynamic voltage and frequency scaling (DVFS), that use run-time system dynamics to reconfigure the system for improving its energy efficiency are being investigated. A vertically integrated approach where these system-level techniques are explored while being cognizant of the underlying silicon-photonic link circuits and silicon-photonic devices is adopted.At a broader level, this project paves the way for the rapid adoption of silicon-photonic link technology to enable the design of energy-efficient manycore systems. This can provide energy-efficient computing solutions in turn reducing the cost of operation and carbon footprint of the nation?s computing server farms and data centers. On the educational front, the project leverages the numerous outreach programs run by Boston University to engage students with various backgrounds and levels of education in the different research activities associated with the project.
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