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SHF: Large:Collaborative Research: Architecting the Next Generation Memory Hierarchy - A Holistic Approach

SHF: Large:Collaborative Research: Architecting the Next Generation Memory Hierarchy - A Holistic Approach
SHF:大型:协作研究:构建下一代内存层次结构 - 整体方法
批准号:
1212962
负责人:
Onur Mutlu
金额:
$34.0万
依托单位:
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
2012
资助国家:
美国
项目状态:
已结题
起止时间:
2012-08-01 至 2016-07-31

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中文摘要
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英文摘要
The memory system continues to be a major performance and powerbottleneck in nearly all computing systems. And, it is becomingincreasingly more so with major application, architecture, andtechnology trends. Embedded applications that acquire andprocess real-time data, Internet and cloud applications that have toanalyze large databases, and the exa-scale era HPC applications thatneed to crunch voluminous data sets are just a few examples ofincreasingly data-intensive applications that require high memorycapacity, performance, and energy efficiency. Thus, the well-known memory wall problem has become even more difficult to surmount andneeds a fundamental rethinking of the memory hierarchy design for futurecomputing platforms.The goal of this proposal is to fundamentally and holisticallyrethink the design of the entire memory hierarchy taking into considerationthe emerging device/memory technologies and to exploit the design trade-offsat different layers of the system stack -- from devices to micro-architecture,compilers and runtime systems. The solution will cover innovations inarchitecting and optimizing the entire memory path consisting of the caches,on-chip networks, memory controller and main memory. The objectiveis to enable 100X improvement in memory capacity over the nextdecade, while providing 5X improvement in performance and10X improvement in energy efficiency. The proposed research has the potential to transform the design ofnext-generation memory systems for the multi-core era, which is expectedto be a ubiquitous part of the entire IT sector.The cross-cutting nature of this research can foster new research directionsin several areas, spanning technology/energy-aware design, computer architecture,compilers, and system/application software. With the memory system formingthe backbone of nearly every envisioned future application domain, thebroader impact of this research can accelerate the design and deploymentof future applications. This project will enable transfer of researchresults to industry, enhance undergraduate and graduate student trainingincluding under-represented students, and contribute to the development of newresearch and teaching tools.
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EAGER: Collaborative Research: Heterogeneous Cores, Memory-Hierarchy and Communication Architectures for Future CMPs
  • 批准号:
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