Application-Specific Memory System Optimizations using Programmable Memory Controllers

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The off-chip memory subsystem is a significant performance and power bottleneck in modern computer systems, necessitating a memory controller that can overcome memory timing and resource constraints by carefully orchestrating data movement between the processor and main memory. The goal of this project is to address this need by enabling application-specific memory system optimizations using a programmable main memory controller, thereby improving the performance, energy-efficiency, and quality-of-service of future computer systems. To realize this vision of programmable main memory controllers, the project addresses challenges all the way from the hardware design of programmable processing units to the firmware implementation of novel memory management algorithms. Automated machine learning and search techniques are employed to quickly arrive at high-performance control algorithms customized to different applications, and to different phases of a single application. Application-specific memory management algorithms ranging from address mapping, command scheduling, and DRAM power management to error-correcting codes and memory compression are developed.The flexibility of the resulting application-specific memory systems is expected to have a direct impact on the performance and energy-efficiency of future computer systems, with tremendous positive fallout to science, technology, and society as a whole. Architecture and software innovations are disseminated to the broader research community through published papers, as well as tutorials on programmable controllers and application-specific memory controller algorithms at major conferences. The educational component of the project involves (1) training both graduate and undergraduate students in computer architecture, (2) a memory systems course that integrates programmable memory controllers and next-generation memory systems into the syllabus, and (3) a memory controller design experience for undergraduates as part of the existing computer architecture curriculum.