XPS: EXPL: DSD: A Memristive Hardware Platform for Large Scale Combinatorial Optimization
XPS:EXPL:DSD:用于大规模组合优化的忆阻硬件平台
基本信息
- 批准号:1533762
- 负责人:
- 金额:$ 29.83万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:2015
- 资助国家:美国
- 起止时间:2015-09-01 至 2019-08-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Mathematical optimization plays a vital role in virtually every scientific discipline. A 2013 report by the U.S. National Academy of Sciences (NAS) identifies optimization as one of the seven giants of statistical data analysis on massive data, while the U.S. Department of Energy (DOE) Office of Science reports that mathematical optimization will increasingly be used in the exascale era. Solving large-scale optimization problems on massive datasets can require weeks or months of computation time on modern supercomputers, which regrettably deliver only a small fraction of the peak performance due to significant data movement overheads. Hardware and software innovations that can improve energy efficiency by orders of magnitude are needed before exascale platforms for mathematical optimization can become practical.This project embodies a radically different vision of the future, one where large scale combinatorial optimization problems are mapped onto a memory-centric, non-Von Neuman compute substrate and solved in situ within the memory cells, with orders of magnitude greater performance and energy efficiency than contemporary supercomputers. Recent developments in the resistive random access memory (RRAM) technology are leveraged to build an extremely low power, fast memory substrate for accelerating combinatorial optimization algorithms. RRAM is a memristive, non-volatile memory technology that provides FLASH-like density and DRAM-like read speeds. The project exploits the electrical properties of RRAM in combination with CMOS transistors to enable in situ optimization within the memory cells, thereby eliminating data movement between the memory arrays and the computational units, reducing the energy, and significantly increasing the performance. Novel algorithms will be developed to map problems from different scientific and engineering domains onto the proposed memristive hardware substrate. Software modules and libraries for memory allocation and partitioning; dynamic resource management; and hardware-software co-design will be developed to give the user control of the optimization process at runtime. At the hardware level, the accelerator employs a versatile organization of data arrays constructed from novel RRAM cells, capable not only of storing the data, but also of performing in situ computation on that data. The proposed research holds the promise of bringing about a transformative change in the performance and energy efficiency of exascale optimization frameworks, with tremendous positive fallout to science, technology, and society as a whole. Architecture and software innovations will be disseminated to the broader research community through published papers, as well as tutorials on the proposed framework and mapping algorithms. The educational component of the project involves training both graduate and undergraduate students in computer architecture, as well as a memory systems course that integrates the RRAM technology into the syllabus. The PI is also personally involved in local programs promoting the participation of women and underrepresented minorities in computer science and engineering, and has an ongoing effort to increase the enrollment of local minorities in University of Rochester's CS and ECE programs.
数学优化在几乎每一个科学学科中都起着至关重要的作用。美国国家科学院(NAS) 2013年的一份报告将优化确定为海量数据统计数据分析的七大巨头之一,而美国能源部(DOE)科学办公室报告称,数学优化将在百亿亿次时代得到越来越多的应用。在现代超级计算机上解决大规模数据集上的大规模优化问题可能需要数周或数月的计算时间,遗憾的是,由于大量的数据移动开销,这些超级计算机只能提供峰值性能的一小部分。在用于数学优化的百亿亿级平台成为现实之前,需要通过硬件和软件创新来提高能源效率。这个项目体现了一个完全不同的未来愿景,在这个愿景中,大规模的组合优化问题被映射到以内存为中心的非冯·诺伊曼计算基板上,并在存储单元内就地解决,其性能和能源效率比当代超级计算机高几个数量级。利用电阻式随机存取存储器(RRAM)技术的最新发展来构建极低功耗、快速的存储器衬底,以加速组合优化算法。RRAM是一种记忆、非易失性存储器技术,提供类似flash的密度和类似dram的读取速度。该项目利用RRAM的电学特性与CMOS晶体管相结合,实现存储单元内的原位优化,从而消除存储阵列和计算单元之间的数据移动,降低能量,并显着提高性能。将开发新的算法,将不同科学和工程领域的问题映射到所提出的忆阻硬件基板上。用于内存分配和分区的软件模块和库;动态资源管理;并将开发软硬件协同设计,使用户能够在运行时控制优化过程。在硬件层面,加速器采用了一种由新型RRAM单元构建的通用数据阵列组织,不仅能够存储数据,还能够对该数据执行原位计算。这项提议的研究有望在百亿亿次优化框架的性能和能源效率方面带来革命性的变化,对科学、技术和整个社会都有巨大的积极影响。架构和软件创新将通过发表论文,以及关于拟议框架和映射算法的教程,传播给更广泛的研究界。该项目的教育部分包括对计算机体系结构的研究生和本科生进行培训,以及将RRAM技术集成到教学大纲中的存储系统课程。PI还亲自参与当地的项目,促进妇女和未被充分代表的少数民族参与计算机科学和工程,并不断努力增加罗切斯特大学CS和ECE项目中当地少数民族的入学率。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Engin Ipek其他文献
Accommodating Workload Diversity in Chip Multiprocessors via Adaptive Core Fusion
通过自适应核心融合适应芯片多处理器中的工作负载多样性
- DOI:
- 发表时间:
2006 - 期刊:
- 影响因子:0
- 作者:
Engin Ipek - 通讯作者:
Engin Ipek
The Memristive Boltzmann Machines
忆阻玻尔兹曼机
- DOI:
10.1109/mm.2017.53 - 发表时间:
2017 - 期刊:
- 影响因子:3.6
- 作者:
M. N. Bojnordi;Engin Ipek - 通讯作者:
Engin Ipek
STT-MRAM memory cells with enhanced on/off ratio
具有增强开/关比的 STT-MRAM 存储单元
- DOI:
10.1109/socc.2012.6398400 - 发表时间:
2012 - 期刊:
- 影响因子:0
- 作者:
Ravi Patel;Engin Ipek;E. Friedman - 通讯作者:
E. Friedman
A programmable memory controller for the DDRx interfacing standards
适用于 DDRx 接口标准的可编程内存控制器
- DOI:
- 发表时间:
2013 - 期刊:
- 影响因子:0
- 作者:
M. N. Bojnordi;Engin Ipek - 通讯作者:
Engin Ipek
Field driven STT-MRAM cell for reduced switching latency and energy
场驱动 STT-MRAM 单元可减少开关延迟和能耗
- DOI:
10.1109/iscas.2014.6865599 - 发表时间:
2014 - 期刊:
- 影响因子:0
- 作者:
Ravi Patel;Engin Ipek;E. Friedman - 通讯作者:
E. Friedman
Engin Ipek的其他文献
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{{ truncateString('Engin Ipek', 18)}}的其他基金
EAGER: Collaborative Research: Memristive Accelerator for Extreme Scale Linear Solvers
EAGER:协作研究:用于超大规模线性求解器的忆阻加速器
- 批准号:
1548078 - 财政年份:2015
- 资助金额:
$ 29.83万 - 项目类别:
Standard Grant
Application-Specific Memory System Optimizations using Programmable Memory Controllers
使用可编程内存控制器进行特定于应用的内存系统优化
- 批准号:
1217418 - 财政年份:2012
- 资助金额:
$ 29.83万 - 项目类别:
Standard Grant
CAREER: Overcoming the Many-Core Power Wall with Resistive Computation
职业生涯:通过电阻计算克服多核电源墙
- 批准号:
1054179 - 财政年份:2011
- 资助金额:
$ 29.83万 - 项目类别:
Continuing Grant
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