SHF: Small: Redesigning Manycore Computer Architecture for the Mega-core Data Center

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Trends in computing have favored moving computation into centralized locations, called data centers. This centralization is occurring because the aggregation of computing allows better amortization of personnel managing the computers, economies of scale in computing equipment purchasing, and improved economies of scale in power delivery, buildings, and cooling. Coupled with these benefits, companies that run large data centers have begun leasing spare computational capacity to smaller companies, thereby enabling small companies to experience the benefits of high quality and high availability computing. Small companies can leverage these resources to have explosive growth on the Internet without the need to deploy data centers of their own. Current data centers commonly use commodity computer chips designed for desktop and laptop computers. This research, in contrast, explores how to optimize computer chips specifically for the data center. In addition, this research examines how the computer chip itself can be modified to enable more efficient sharing of resources between different customers of large data center providers and how computer chip architecture can be modified to support new economic models such as leasing of computer resources. This work is important because it will decrease the cost of creating large data centers, enable better transparency in billing for computational resources in large-scale shared data centers, and allow data centers to be more energy efficient.This research attacks several of the key challenges in building manycore processors optimized for Infrastructure as a Service (IaaS) Cloud computing systems. This work breaks down arbitrary boundaries between cores in a manycore system by allowing resources from one processor core to be utilized by another processor core. This can enable the hardware resources provided to a particular virtual machine to be matched to the needs of that particular virtual machine. In addition, this work is investigating how to optimize cache hierarchies for thousands of independent data and instruction streams to enable more efficient memory hierarchies, and this work is characterizing how different architectural resources are utilized when shared between multiple Cloud-specific applications.