EAGER: Collaborative Research: Compiler and Architecture Support for Avoiding Writes to Memory-Preliminary Study

EAGER：协作研究：避免写入内存的编译器和架构支持 - 初步研究

• 批准号: 1237417
• 负责人: Krishna Kavi
• 金额: $ 7.49万
• 依托单位: University of North Texas
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2012
• 资助国家: 美国
• 起止时间: 2012-05-15 至 2014-04-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1237417&HistoricalAwards=false
• 关键词: EAGER; Collaborative; Research; Compiler; Architecture

The cost of writing data from a computer's processor to its storage components remains a bottleneck for modern computing systems. The speed of the processor continues to improve, more processing units are packed into a computer chip, but these advances only cause more data to be written to storage per second. The speed of storage subsystems has not kept pace with the processor?s ability to produce data for storage, and this difference in performance is likely to continue. Moreover, the trend in building storage subsystems for computers is to utilize technologies such as flash memories whose contents can be changed a relatively small number of times before the memory wears out. These technologies are cheaper and pack more storage into a given area, but care must be taken to avoid writing to memories made from such technologies at rates usually seen from a processor to memory. This EAGER project aims to discover mechanisms that reduce or eliminate traffic from a processor to the storage subsystem. Elimination of such traffic increases the speed of the overall system and saves wear on storage components. This research finds data that would otherwise be sent to storage from the processor and eliminates such writes to memory. This technique is based on finding that such data cannot subsequently be referenced by an application. This effort focuses on a preliminary study to validate the technical approach, namely investigating the consequences of eliminating stores of data that has been explicitly deallocated by an application.

将数据从计算机处理器写入其存储组件的成本仍然是现代计算系统的瓶颈。处理器的速度不断提高，更多的处理单元被封装到计算机芯片中，但这些进步只会导致每秒更多的数据被写入存储器。存储子系统的速度没有跟上处理器的步伐？的能力来产生存储数据，而且这种性能上的差异可能会继续下去。此外，构建用于计算机的存储子系统的趋势是利用诸如闪存之类的技术，其内容在存储器磨损之前可以被改变相对较少的次数。这些技术更便宜，并且在给定区域中封装了更多的存储，但必须注意避免以通常从处理器到存储器的速率写入由这些技术制成的存储器。EAGER项目旨在发现减少或消除从处理器到存储子系统的流量的机制。消除这种流量可以提高整个系统的速度，并减少存储组件的磨损。该研究发现了否则将从处理器发送到存储的数据，并消除了对内存的此类写入。这种技术是基于发现这样的数据不能随后被应用程序引用。这项工作的重点是初步研究，以验证技术方法，即调查消除已被应用程序显式释放的数据存储的后果。