Collaborative Research:XPS:CLCCA: Cross-layer Thermal Reliability Management in 3D Integrated Heterogeneous Processor for Breaking the Power and Bandwidth Walls

通过tsv（通硅过孔）垂直连接的CPU、GPU和DRAM芯片的3D堆叠集成正在成为未来并行和可扩展计算系统的关键支持技术。这种3D异构处理器（3DHP）有望提供更高的带宽，更低的延迟和功耗，以打破电源和带宽的墙壁。尽管有这些显著的好处，3DHP也带来了新的特定领域的挑战，这些挑战从未得到充分的探索和解决。更高的功率密度、更薄的衬底以及层间介质材料的低导热性都使得热管理成为一个严重的问题，威胁到3DHP的整体可靠性和性能。本项目旨在通过整体跨层方法解决3DHP的热完整性问题。三个主要的热完整性问题在各自的目标系统层，包括物理层，架构层和运行时层及其相关性将由三个具有必要背景和专业知识的pi团队广泛调查。提出的跨层方法包括：1)物理层自校准片上温度/应力协同传感器框架；2)架构层自适应错误检测和校正（EDAC）和DRAM刷新引擎，用于在CPU、GPU和DRAM芯片之间可靠地存储和传输数据；3)动态热可靠性管理（DTRM）框架，用于在运行时层对工作负载和硬件资源之间的交互进行细粒度控制。提出的分层技术将紧密交织在一起，以产生最大的协同效果。该项目的研究将为可行的基于3dhp的并行和可扩展计算系统提供可靠的热完整性设计和仿真框架。

3D stacked integration of CPU, GPU and DRAM dies vertically interconnected by TSVs (Through-Silicon Vias) is emerging as a key enabling technology for parallel and scalable computing systems of tomorrow. Such 3D Heterogeneous Processor (3DHP) is expected to deliver much higher bandwidth, lower latency and power consumption to break the power and bandwidth walls. Despite such significant benefits, 3DHP comes with new domain-specific challenges that have never been fully explored and addressed. Significantly higher power density, thinned substrate and low thermal conductivity of inter-layer dielectric material all make thermal management a serious problem that threatens overall reliability and performance of 3DHP. This project aims to address this thermal-integrity issue of 3DHP through a holistic cross-layer approach. Three major thermal integrity issues at respective target system layers including physical, architecture and runtime layers and their correlations will be extensively investigated by a team of three PIs with necessary background and expertise. The proposed novel cross-layer approach includes: 1) Self-calibrated on-chip temperature/stress co-sensor framework at physical layer, 2) Adaptive Error Detection & Correction (EDAC) and DRAM refresh engine at architecture layer for reliable storage and transfer of data among CPU, GPU and DRAM dies, and 3) Dynamic Thermal Reliability Management (DTRM) framework for fine-grained control of interaction between workloads and HW resources at runtime layer. The proposed layered techniques will be tightly interwoven to bring out the most synergistic results. The research in this project will result in a solid thermal-integrity design and simulation framework for viable 3DHP-based parallel and scalable computing systems.