Collaborative Research:Cross-Domain Built-In Tuning of Advanced Mixed- Signal Radio-Frequncy Systems-on-Chip For Yield Recovery and Electrical Stress Management

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This research will make significant contributions to Integrated Circuits (ICs) design which are critical components in all computing, communications and sensing systems. The proposed research is multidisciplinary, spanning the fields of mixed-signal/ analog/Radio-Frequency (RF) design and simulation as well as computer science. It also contains a comprehensive plan for outreach activities and integration of research and education which are essential for enhancing the scientific and engineering workforce.The graduate students working on the project will receive cross-disciplinary training across diverse areas of electrical and computer engineering and computer science. In addition, the multi-disciplinary links to other system-level design disciplines will be explored and developed. The students will participate in summer internship programs with industry and work on real industry test cases. This will facilitate technology transfer to industry and will also challenge the PIs and students to address practical issues that impact commercialization of the technology developed in this research. The research will be disseminated through conference and journal papers, patents as well as demonstrations of working hardware prototypes. The PI and co-PI will make maximum efforts to involve undergraduate students at Georgia Tech and at Purdue in the research project. It will also be possible to involve undergraduate project students in this research through senior design projects. Thus, funding for this project will support the goals of recruiting more U.S. citizens, women and minorities to graduate programs at G.Tech and Purdue Mixed-signal/RF/mm-wave Circuits and systems of the future, manufactured with aggressive CMOS processing technologies will need to be tuned aggressively for performance throughout their life cycle using built-in self-tuning mechanisms. New algorithms and on-chip infrastructure need to be developed for tuning large numbers of parameters (e.g. bias currents, matching networks) of these devices efficiently to improve manufacturing yield and reduce field maintenance costs. Without such tuning mechanisms it will be difficult to introduce new advanced electronic products into the marketplace at low cost. This research will develop new engineering principles for cross-domain (across different circuit modules including digital compensation) built-in tuning of high performance wireless communication systems using multi-dimensional optimization and supervised learning techniques. Intelligent built-in testing methods will be used to expose the process parameters corresponding to each device. This information along with process data from wafer maps and test response data from built-in sensors will be used to tune complex wireless systems for Multiple-Input-Multiple Output (MIMO) beamforming and polar radio. In addition, field tuning will also be applied to extending the useful life of devices in the field by redistributing electrical stresses from electrical degradation. The core concepts developed will be applicable to a host of mixed-signal/analog/high-speed devices such as Wired-Local-Area Network(WLAN) systems, sensor networks, automobile control systems,and others.