SBIR Phase I: Tortuga GLIFT: Hardware Security Design and Analysis Toolkit

SBIR 第一阶段：Tortuga GLIFT：硬件安全设计和分析工具包

• 批准号: 1416561
• 负责人: Jason Oberg
• 金额: $ 15万
• 依托单位: Tortuga Logic, Inc.
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2014
• 资助国家: 美国
• 起止时间: 2014-07-01 至 2015-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1416561&HistoricalAwards=false
• 关键词: SBIR; Phase; Tortuga; GLIFT; Hardware

The broader impact/commercial potential of this Small Business Innovation Research (SBIR) Phase I project is centered on transforming the way semiconductor companies are capable of approaching the issue of security - an aspect of their designs that has wide ranging impacts for our nation's commerce and infrastructure. The hardware security tool proposed in this project will enable a formal assessment of hardware system security by providing the ability to prove security properties on concrete hardware implementations. This work was motivated by interviews with over 100 prospective end users as part of the National Science Foundation Innovation Corps program, which determined that 1) current methods simply fail to address a broad scope of important vulnerabilities, and 2) there is significant demand for tools that enable engineers to discover and eliminate those vulnerabilities. With the continued growth of the cyber security ($77B) and mobile hardware security ($1B) markets, the proposed research has significant potential for sustained commercial impact.This Small Business Innovation Research (SBIR) Phase I project will develop the first tool for secure hardware design. The senior personnel on this project have learned first-hand that such a tool is both in high demand from a variety of semiconductor companies and that there is nothing currently on the market to satisfy this demand. In order to develop the tool most critically needed by our potential customers, this development project will focus on three main objectives. First, it will integrate core technology developed previously by the company's senior personnel with formal solvers in order to enable the specification and verification of provable security properties. Second, it will develop a formal language allowing hardware developers to specify an important class of security assertions that fits cleanly into modern industry practices. Lastly, this development effort will extend current state-of-the-art technology to allow hardware designs to be tested in the presence of multi-level security policies beyond just the conventional "untrusted" and "trusted" paradigms. The outcome of this project will be a tool ready to be tested on industry grade hardware designs.

这个小型企业创新研究（SBIR）第一阶段项目的更广泛的影响/商业潜力集中在改变半导体公司处理安全问题的方式上-他们的设计对我们国家的商业和基础设施有广泛的影响。 在这个项目中提出的硬件安全工具，将使一个正式的评估硬件系统的安全性，提供的能力，以证明具体的硬件实现的安全属性。 这项工作的动机是采访了100多名潜在的最终用户，作为美国国家科学基金会创新团队计划的一部分，该计划确定：1）目前的方法根本无法解决广泛的重要漏洞，2）对能够使工程师发现和消除这些漏洞的工具有很大的需求。随着网络安全（770亿美元）和移动的硬件安全（10亿美元）市场的持续增长，拟议的研究具有持续商业影响的巨大潜力。这个小型企业创新研究（SBIR）第一阶段项目将开发第一个安全硬件设计工具。该项目的高级人员已经亲身了解到，这种工具不仅受到各种半导体公司的高度需求，而且目前市场上没有任何产品可以满足这种需求。为了开发我们潜在客户最迫切需要的工具，该开发项目将侧重于三个主要目标。首先，它将把公司高级人员以前开发的核心技术与正式求解器集成在一起，以便能够规范和验证可证明的安全属性。 其次，它将开发一种正式的语言，允许硬件开发人员指定一种重要的安全断言，这种断言完全适合现代工业实践。最后，这项开发工作将扩展当前最先进的技术，使硬件设计能够在存在多级安全策略的情况下进行测试，而不仅仅是传统的“不可信”和“可信”范例。 该项目的成果将是一个工具，准备在工业级硬件设计上进行测试。