CAREER: Reconfigurable Communication Interface using Ultra-Low-Power Technique for Future Heterogeneous Mobile Devices

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As mobile devices such as smartphones, tablets and portable devices continue to have enhanced graphic/media computing capabilities and superior battery life, higher power and bandwidth efficiency is becoming significantly important. Furthermore, ever-increasing full integration of heterogeneous key circuits such as CPU, memories and other IPs is creating another challenging problem such as non-reconfigurable data communication. The objective of this proposal is to develop power-efficient and reconfigurable interface to address key issues such as limited bandwidth, energy efficiency and data communication flexibility of mobile devices. The proposed approach is a new reconfigurable multi-modulation interconnect (MMI) technology as the mobile communication interface between CPU and memories, which is expected to provide dramatically reduced system power consumption, increased computing bandwidth, simultaneous multiple data communication and reconfigurable data access capabilities. Moreover, the proposed MMI communication system could have significant impact on industries and academia and improve the competitiveness of the U.S. microelectronics industry. This research is interdisciplinary, which will provide excellent education opportunities for students at various levels to acquire broad knowledge and skills related to analog/mixed-signal and radio frequency/microwave integrated circuit and system design. Minority students and women from underrepresented groups will be recruited and trained by integrating research with education.This research will develop new energy-efficient and reconfigurable interface circuit architecture by overcoming the current technological challenges associated with limited bandwidth, high power consumption and non-reconfigurable data accesses. Specifically, the PI proposes reconfigurable multi-modulation interconnect (MMI) to allow significant advances in both energy efficiency and bandwidth between mobile CPU and memories through incorporating advanced pulse-amplitude modulation and multi-band signaling interconnect. A prototype of MMI signaling in CMOS will be demonstrated, which will be the first effort in analyzing, designing and fabricating fully CMOS-compatible MMI-based memory interface for mobile devices. The proposed innovative MMI technology is also expected to impact on mobile computing and communication device and computer architecture by enabling concurrent and reconfigurable data communication on a shared link and extending significantly battery life simultaneously.