BRIGE: Energy-Efficient and High-Bandwidth Reconfigurable Mobile Memory Interface for Heterogeneous Mobile Computing

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PI: Gyungsu ByunInsitution: West Virginia UniversityIntellectual Merit: Current mobile interface signaling technologies such as baseband-only and multi-level signaling have critical technological limitations, particularly non-reconfigurable data access, limited bandwidth and super-linear energy consumption. The objective of this BRIGE project is to analyze, design, fabricate and verify an energy-efficient and high bandwidth reconfigurable mobile memory interface for heterogeneous mobile computing by using novel simultaneous bidirectional and reconfigurable multiple data access-capable interconnect between multi-core processors and memory subsystem. This proposed interconnect can significantly reduce the multiple concurrent task loads of heterogeneous multi-core systems that consist of different processing units such as image (or bio) sensor interface units and general-purpose multi-core, graphics (or image) and digital signal processors. At the completion of this project, it is our expectation that we will have developed an innovative mobile interface that will allow future mobile interfaces to provide significant advances of energy efficiency and bandwidth in mobile devices such as smart phones (or tablets) and ultraportable computing systems. Furthermore, the proposed prototype chip fabrication and testing of critical MBI circuits and systems will play key roles in providing novel computer architecture-level innovations, resulting in new insights and potential solutions for future mobile interfaces between mobile chips which need both much better energy efficiency and much higher bandwidth.Broader Impacts: The proposed mobile reconfigurable interface between heterogeneous multi-core processor and memory system can be expected to improve simultaneously both energy efficiency and bandwidth of mobile devices by using continuous improvement of silicon technologies and to provide new opportunities to industrial and consumer electronics for nonvolatile (or volatile) memory and system on chip applications. The project will also help develop a globally competitive engineering workforce by training students capable of integrating knowledge and insights from the proposed microelectronic and integrated circuit designs, improve collaborative research between academia and industry, help broaden participation of women and minorities in engineering fields, and improve undergraduate engineering education through extensive outreach activities. Specifically, women and underrepresented undergraduate students who will be recruited by the Lane Experienced in Applied Design (LEAD) program, which has been successful in recruiting women and under-represented groups into the graduation program in the PI?s department for many years, will become actively involved in the proposed research project as part of their capstone design experience.