SBIR Phase II: Low-density parity-check error correction for enhanced reliability of flash memories

这个小企业创新研究（SBIR）第二阶段项目的更广泛的影响/商业潜力是技术和经济的。开发的纠错解决方案将使基于闪存的设备具有更高的容量、更高的可靠性和更快的速度，同时降低成本。这将对移动的计算能力和企业存储产生重大影响，提高数据中心、服务器和包含闪存的关键任务存储的效率和可靠性。改进的企业存储可提高IT业务、电子商务和金融贸易的效率和增长。这些解决方案还将降低功耗和散热，从而实现更环保的系统。 纠错解决方案的优势也适用于硬盘驱动器和通信行业。这个小型企业创新研究（SBIR）第二阶段项目将开发和验证用于基于闪存的固态硬盘（SSD）的新型低密度奇偶校验（LDPC）纠错。SSD由于其速度快、功耗低和散热低而迅速部署在企业和消费者存储中。但是，它们带来了许多技术挑战，这些挑战源于这样一个事实，即减小闪存单元尺寸会导致可靠性不可避免地下降。随着增加芯片密度以实现更高存储容量的趋势，该行业正在迅速转向采用LDPC码以提供更强大的纠错。然而，现有的LDPC解决方案使用复杂的后处理和多次读取来将错误率降低到期望的水平，这降低了读取速度，使得它们对未来的SSD没有吸引力。 将针对一系列参数开发基于新型二进制LDPC的解决方案，并在硬件中进行验证。 该设计方法将扩展到开发新的非二进制LDPC解决方案，提供更大的可靠性增强，从而提高SSD的耐用性。

The broader impact/commercial potential of this Small Business Innovation Research (SBIR) Phase II project are both technical and economic. The developed error-correction solutions will enable flash-memory-based devices to have higher capacities, higher reliability, and faster speeds at lower power while driving down the cost. This will have a major impact on mobile computing capabilities and enterprise storage by improving the efficiency and reliability of data centers, servers, and mission-critical storage that incorporate flash memories. Improved enterprise storage boosts the efficiency and growth of IT businesses, e-commerce, and financial trade. The solutions will also enable reduced power consumption and heat dissipation leading to greener systems. The benefits of the error-correction solutions are also applicable to the hard disk drive and communications industries.This Small Business Innovation Research (SBIR) Phase II project will develop and validate novel low-density parity-check (LDPC)-based error-correction for flash memory-based solid state drives (SSDs). SSDs are rapidly being deployed for both enterprise and consumer storage due to their fast speeds, low power, and low heat dissipation. But they bring numerous technical challenges stemming from the fact that reducing flash memory cell sizes leads to an unavoidable degradation in the reliability. With a trend of increasing die density to enable higher storage capacities, the industry is swiftly moving towards adopting LDPC codes to provide more powerful error-correction. However existing LDPC solutions use complex post-processing and multiple reads to bring down the error rates to the desired levels which lowers the read speeds, making them unattractive for future SSDs. Novel binary LDPC-based solutions will be developed for a range of parameters, and validated in hardware. The design method will be extended to develop new non-binary LDPC solutions which provide even greater reliability enhancements, leading to greater endurance in SSDs.