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SaTC: CORE: Small: Collaborative: Techniques for Enhancing the Security and Trust of FPGAs-Based Systems

SaTC: CORE: Small: Collaborative: Techniques for Enhancing the Security and Trust of FPGAs-Based Systems
SaTC:核心:小型:协作:增强基于 FPGA 的系统的安全性和信任的技术
批准号:
1814804
负责人:
Ryan Robucci
金额:
$19.94万
依托单位国家:
美国
项目类别:
Standard Grant
财政年份:
2018
资助国家:
美国
项目状态:
已结题
起止时间:
2018-08-15 至 2023-07-31

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中文摘要
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英文摘要
Secret keys that are stored and used within physical devices can be extracted by adversaries. The attacks involve measuring the power consumption or electromagnetic radiation emanating from the chip as it carries out encryption, and then analyzing them to deduce the secret key. This project investigates techniques that self-mutate the hardware at runtime as a means of significantly reducing and ideally eliminating signal information leveraged by the adversary.The research carried out in this project investigates side-channel leakage, particularly as it relates to signal propagation paths within the encryption engine. A hardware description of the proposed self-mutating hardware will be implemented on a field-programmable gate array (FPGA) using dynamic partial reconfiguration. Multiple instances of encryption engine components, e.g., the Advanced Encryption Standard (AES) substitution box (SBOX), will be created using implementation diversity techniques as a means of diversifying signal propagation paths, and a self-reconfiguration hardware engine will randomly choose instances to reprogram on-the-fly. Advanced differential power analysis (DPA)-type attacks will be carried out to determine the resilience of the proposed countermeasures.The techniques, data and hardware developed in this research will be integrated into undergraduate and graduate level courses at University of New Mexico, University of Maryland Baltimore County and University of North Carolina at Charlotte, and red-team/blue-team competitions will be created. Minority and underrepresented students will be recruited to participate in funded research activities.A project repository will be created and maintained at University of North Carolina, Charlotte at the web address http://www.ece.uncc.edu/fareena/SPREAD for 5 years. The hardware description language, software, data, analysis methods and copies of the papers will be made available for download.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
期刊论文(2)
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科研奖励(0)
会议论文
Instruction Sequence Identification and Disassembly Using Power Supply Side-Channel Analysis
使用电源侧通道分析进行指令序列识别和反汇编
DOI: 10.1109/tc.2020.3018092
发表时间: 2020
期刊: IEEE Transactions on Computers
影响因子: 3.7
作者: [Krishnankutty, Deepak, Li, Zheng, Robucci, Ryan, Banerjee, Nilanjan, Patel, Chintan]
通讯作者: Patel, Chintan
Node Monitoring as a Fault Detection Countermeasure against Information Leakage within a RISC-V Microprocessor
节点监控作为 RISC-V 微处理器内信息泄漏的故障检测对策
DOI: 10.3390/cryptography6030038
发表时间: 2022
期刊: Cryptography
影响因子: 1.6
作者: [Owen, Donald E., Joseph, Jithin, Plusquellic, Jim, Mannos, Tom J., Dziki, Brian]
通讯作者: Dziki, Brian
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